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These macros, broken since day one, should CreateByteField instead
of CreateWordField. Without the fix, any ASLs that try to use it
will fail to compile with a "ResourceTag smaller than Field"
warning.
Change-Id: Ieeb509aece8836785998b23fdc805a747d40a77a
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/22066
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Some Super I/O PnP devices are detected by string matching the hardware
ID. Allow providing a custom HID to override the default generic one.
Change-Id: I7793b7d53c9d94667675f9dee63358521ac8c4be
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-on: https://review.coreboot.org/20076
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Some Super I/O logical devices have three I/O port ranges, such as the
GPIO on the IT8720F. Allow specifying a third I/O range. While here, fix
a typo in the I/O range description.
Change-Id: Idad03f3881e0fbf2135562316d177972f931afec
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-on: https://review.coreboot.org/20024
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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ITE super-i/o chips need a fourth byte and have a special register
to exit config mode.
Change-Id: Ic40873649d567b87d3a937f2bf068649e67715de
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/17286
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.
This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.
Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.
However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.
util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
-a \! -name \*.patch \
-a \! -name \*_shipped \
-a \! -name LICENSE_GPL \
-a \! -name LGPL.txt \
-a \! -name COPYING \
-a \! -name DISCLAIMER \
-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +
Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
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The W83627DHG has some power managements bits to power down individual
logical devices. These are called `* Power Down`. Counterintuitively and
in contrast to `Immediate Power Down` (bit to power down the whole chip),
these bits are set when the respective logical device is powered.
Unfortunately, our ACPI code set them wrong which led to disabled
devices after a S3 suspend/resume. Adding an option how to set the PM
bits and setting them to zero for the W83627DHG, corrects it.
Tested with kontron/ktqm77.
Change-Id: I8a472d480d4277721bd17c9f7c2ce44fa84e8ae2
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3590
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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I'm trying to make writing ACPI code for super i/o devices more
comfortable.
pnp.asl hosts some general cpp macros.
The other four files are to be included in dsdt trees. They are
controlled by cpp macros which should be defined/undefined before
inclusion.
Work was inspired by Christoph Grenz' ACPI code for the W83627HF.
Change-Id: Idb55332ba9bc788c98964d30a450e0d734cf28ec
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3286
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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