| Age | Commit message (Expand) | Author |
|---|
| 2008-09-22 | Patch for AMD RS690 chipset. | Michael Xie |
| 2008-09-19 | Attached patch fixes at least one issue ;) During the PCI BAR sizing must b... | Rudolf Marek |
| 2008-09-18 | ck804 whitespace fixes | Myles Watson |
| 2008-09-05 | This patch adds support for the VIA VT8237S south bridge. The VT8237R program... | Rudolf Marek |
| 2008-09-03 | Tidy up identifiers, per Uwe's suggestion. Trivial. | Ed Swierk |
| 2008-09-01 | This patch gets the Epia-CN working without ACPI or APIC. | Bari Ari |
| 2008-08-25 | This patch adds PCI device IDs for the Intel EP80579 Integrated Processor, | Ed Swierk |
| 2008-08-25 | This patch modifies the Intel 3100 southbridge code to recognize the | Ed Swierk |
| 2008-08-01 | coding style fixes (trivial) | Stefan Reinauer |
| 2008-07-12 | There was a programming error which made most USB port4 setup wrong. This pat... | Marc Jones |
| 2008-06-20 | Extend the VIA vt8237r southbridge decode range for the ROM to 1MB. | Bari Ari |
| 2008-05-07 | Implement GPIO configuration routines for the Intel 3100 southbridge, | Ed Swierk |
| 2008-05-06 | cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doi... | Marc Jones |
| 2008-04-30 | By default, the Intel 3100 LPC interface enables only I/O range 0x3f8 | Ed Swierk |
| 2008-04-23 | This patch fixes the 3 broken sata ports on the Tyan s2891 (primary port on | Ward Vandewege |
| 2008-04-06 | This patch halts the tco timer early in the boot process on all ICH series so... | Joseph Smith |
| 2008-04-01 | Setting an integrated southbridge device (like SATA or USB2.0) to | Ed Swierk |
| 2008-04-01 | Remove i82801DB files that I meant to delete in r3206. | Joseph Smith |
| 2008-04-01 | Tiny style fix for consistency (trivial). | Ed Swierk |
| 2008-04-01 | Removal of i82801DB (ICH4) | Joseph Smith |
| 2008-04-01 | The early init code of several Intel southbridge chipsets calls | Ed Swierk |
| 2008-03-30 | Like other Intel chipsets, the Intel 3100 has a TCO timer that reboots | Ed Swierk |
| 2008-03-29 | Now coreboot performs IRQ routing for some boards. | Nikolay Petukhov |
| 2008-03-20 | Following patch adds K8M890 support. It initializes the AGP and graphics UMA. | Rudolf Marek |
| 2008-03-19 | Following patch will setup KT890 HT automatically. It will find the | Rudolf Marek |
| 2008-03-16 | Here is an updated patch addressing most of Uwe's and Peter's ... | Ed Swierk |
| 2008-03-15 | Following patch extends the ROM decoding to last 1MB, allowing to use larger | Rudolf Marek |
| 2008-03-15 | Following patch fixes the retrain/reset sequence which caused problem with some | Rudolf Marek |
| 2008-02-25 | This trivial patch removes an unused local variable, thus getting rid of | Ronald Hoogenboom |
| 2008-02-20 | Route device IRQ through PCI bridge instead in mptable. | Yinghai Lu |
| 2008-01-18 | Rename almost all occurences of LinuxBIOS to coreboot. | Stefan Reinauer |
| 2008-01-18 | Please bear with me - another rename checkin. This qualifies as trivial, no | Stefan Reinauer |
| 2007-12-19 | Additional early AMD8111 southbridge support for Barcelona platforms. | Marc Jones |
| 2007-11-30 | Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s): | Uwe Hermann |
| 2007-11-29 | Restructure/rename/comment a few 82371XX-related PCI IDs (trivial). | Uwe Hermann |
| 2007-11-20 | 1. Fix pirq routing table setting for GA-2761GXDK. | Morgan Tsai |
| 2007-11-15 | Various cosmetic fixes and improvements (trivial). | Uwe Hermann |
| 2007-11-14 | * Maintaining SiS south bridge device IDs. | Morgan Tsai |
| 2007-11-13 | Add support for FID/VID changes messages. | Rudolf Marek |
| 2007-11-13 | Fine-tune the V-link bus between K8T890 and VT8237R and set | Rudolf Marek |
| 2007-11-07 | Add initial support for all known ICH* southbridges to the | Uwe Hermann |
| 2007-11-07 | This patch masks the function prototypes in stdlib.h from ROMCC, so that | Corey Osgood |
| 2007-11-07 | Add PCI IDs for most Intel southbridges of the 82801 series | Uwe Hermann |
| 2007-11-05 | * Change one PCI vendor ID from Nvidia to SiS | Carl-Daniel Hailfinger |
| 2007-11-04 | Various cosmetics, coding style fixes, constifications (trivial). | Uwe Hermann |
| 2007-11-04 | Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up to | Uwe Hermann |
| 2007-11-03 | This patch is some small changes to the vt8237r to prepare it for | Corey Osgood |
| 2007-11-02 | remaining part of the patch. | Stefan Reinauer |
| 2007-11-02 | Delete a file no longer used by the SiS implementation | Jordan Crouse |
| 2007-11-02 | 1. vgabios removed, will go to extra repository | Morgan Tsai |
| 2007-11-02 | trivial fix for the .data problem | Stefan Reinauer |
| 2007-10-30 | Various fixes and improvements of the 82801xx code. | Joseph Smith |
| 2007-10-30 | Add support for the VIA VT8237R southbridge. | Rudolf Marek |
| 2007-10-30 | fix the readwrite/readonly clashes for the pci_driver structs in the sis | Stefan Reinauer |
| 2007-10-29 | Thanks to the great efforts of Morgan Tsai of SiS we support the SiS966 | Morgan Tsai |
| 2007-10-24 | smaller changes to silence build warnings. (trivial) | Stefan Reinauer |
| 2007-10-24 | Ever wondered where those "setting incorrect section attributes for | Stefan Reinauer |
| 2007-10-22 | This patch adds support for K8T890CE northbridge. | Rudolf Marek |
| 2007-10-07 | Fix some issues with spaces in the code and Doxygen style documentation. | Juergen Beisert |
| 2007-10-05 | This patch will add support for the Geode GX1/CS5530 VGA feature. It's able | Juergen Beisert |
| 2007-10-01 | Thee lines in i82801xx_pci.c need to be removed. They cause the | Joseph Smith |
| 2007-09-25 | As per suggestion from Yinghai Lu <yinghailu@gmail.com> this patch | Uwe Hermann |
| 2007-09-22 | Fix another, similar typo as in r2800 (trivial). | Uwe Hermann |
| 2007-09-22 | Fix typo which causes build error if CK804_USE_NIC is set (trivial). | Uwe Hermann |
| 2007-09-14 | More range for HT_CHAIN_UNITID_BASE and HT_CHAIN_END_UNITID_BASE. | Yinghai Lu |
| 2007-09-14 | This is a full rewrite of all the CS5530/CS5530A code. The previous code was | Uwe Hermann |
| 2007-06-19 | Various minor cosmetics and coding style fixes (trivial). | Uwe Hermann |
| 2007-06-19 | The GPIOs used for UART2 RX and TX were reversed. | Marc Jones |
| 2007-06-14 | Small bugfix in i82801xx_lpc.c. | Corey Osgood |
| 2007-06-14 | This patch adds support for the Intel i82810 northbridge and various i82801xx | Corey Osgood |
| 2007-06-03 | Intel 82371EB: Some code simplifications (trivial). | Uwe Hermann |
| 2007-06-02 | The UART disable code was causing a hang and was worked around with a | Marc Jones |
| 2007-05-29 | Intel 82371EB: Add IDE init support. | Uwe Hermann |
| 2007-05-27 | Init for the Intel 82371EB southbridge: make all ROM/BIOS regions | Uwe Hermann |
| 2007-05-24 | Drop the src/southbridge/amd/cs5536_lx directory and its contents, as | Uwe Hermann |
| 2007-05-22 | Add missing license headers, minor cosmetic fixes in existing headers. | Uwe Hermann |
| 2007-05-10 | This fix properly hides the UDC and OTG PCI headers when the cs5536 is | Marc Jones |
| 2007-05-10 | This patch cleans up and clarifies Geode source code comments. | Marc Jones |
| 2007-05-10 | This patch updates the PCI ID of the Geode IDE device to include the revision. | Marc Jones |
| 2007-05-10 | Fix the indent and whitespace to match LinuxBIOS standards | Jordan Crouse |
| 2007-05-10 | Add missing licenses to several of the files. | Jordan Crouse |
| 2007-05-05 | With this patch, the msm800sev runs FILO and boots a kernel. | Ronald G. Minnich |
| 2007-05-04 | patch to fix the IDE configuration on EPIA boards. At some point this | Ben Hewson |
| 2007-05-04 | This patch re-implements support for the CS5536 companion chip for the | Marc Jones |
| 2007-05-03 | Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB, | Uwe Hermann |
| 2007-04-07 | Fix epia-m build after u8/u16/u32 changes in Yh Lu's patch. | Peter Stuge |
| 2007-03-17 | Add initial pre-RAM serial output support for the VIA VT82C686(A/B) | Corey Osgood |
| 2007-02-19 | Fix some CHIP_NAME() entries to use canonical names. | Uwe Hermann |
| 2007-02-03 | Nvidia MCP55 uses CMD to send/receive bytes instead of DAT0, | bxshi |
| 2007-02-02 | I have Sun Ultra40 workstation. Southbridge is nVidia CrushK8-04/nforce | Roman Kononov |
| 2007-02-01 | This patch adds the MCP55 PCI IDs (without which the southbridge code | Ed Swierk |
| 2007-02-01 | Add support for the NVIDIA MCP55 southbridge. | Yinghai Lu |
| 2006-12-28 | A patch to add initial support for the i82801db southbridge based | Jon Dufresne |
| 2006-12-20 | ck804 pref mem 4G above support | Yinghai Lu |
| 2006-12-14 | In the file mainboard/intel/i82801dbm/i82801dbm.c the variable | Jon Dufresne |
| 2006-12-14 | In src/southbridge/intel/i82801ca, first the smbus registers are mapped at i/o | chn |
| 2006-11-05 | Use the canonical name of the vendors/devices and the | Uwe Hermann |
| 2006-11-02 | Sorry, this is the last commit I will do this way, but MSI has waited a | bxshi |
| 2006-10-13 | s2895 failover build | Yinghai Lu |
| 2006-10-13 | return missed | Yinghai Lu |
