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southbridge (with integrated Super-I/O).
Signed-off-by: Corey Osgood <corey_osgood@verizon.net>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey_osgood@verizon.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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same format for all CHIP_NAME() entries in LinuxBIOS (Closes #20).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@linuxbios.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2408 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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disable agp slot in config.lb
fix error in setting up com1 == should be TTYS0_BAUD
note that the uart8250 struct is a bad design, but so is the
uart8250 code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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to fail later than before.
dos2unix'ed the xe7501devkit files, that might have caused some problems
before.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Creator: Li-Ta Lo <ollie@lanl.gov>
More Via EPIA
more via epia stuff, including the trival but fatal bug in auto.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Creator: Li-Ta Lo <ollie@lanl.gov>
emulator update
x96emu update from Paulo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Creator: Li-Ta Lo <ollie@lanl.gov>
TLA is really diffcult to use. How am I going to
roll back my last commit ?
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Creator: Li-Ta Lo <ollie@lanl.gov>
emulator update
Correction to the reduce emulator from Paulo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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smbus_read_byte routine updated as per suggestion by rgm
addition reset & wait_until_ready to allow correct reading of first
byte on epia systems.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1807 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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New Files :-
src/cpu/via/model_centaur/Config.lb
src/cpu/via/model_centaur/model_centaur_init.c
Updated Files :-
src/arch/i386/include/arch/smp/mpspec.h
- make write_smp_table a define for non smp systems
src/cpu/x86/lapic/lapic_cpu_init.c
- change possible typo
src/mainboard/via/epia/Config.lb
src/mainboard/via/epia/Options.lb
src/mainboard/via/epia/auto.c
src/mainboard/via/epia/chip.h
src/mainboard/via/epia/failover.c
- updated after recent code changes
src/northbridge/via/vt8601/chip.h
src/northbridge/via/vt8601/northbridge.c
src/northbridge/via/vt8601/raminit.c
- corrections after recent code changes to allow compiling
src/southbridge/via/vt8231/chip.h
src/southbridge/via/vt8231/vt8231.c
- initial pass to allow compiling after recent code changes.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Things are close but not quite there yet.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1524 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1228 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1227 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1224 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Support for compiling romcc on non x86 platforms
- new romc options -msse and -mmmx for specifying extra registers to use
- Bug fixes to device the device disable/enable framework and an amd8111 implementation
- Move the link specification to the chip specification instead of the path
- Allow specifying devices with internal bridges.
- Initial via epia support
- Opteron errata fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1172 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1163 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Now to fix the ram ...
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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ron
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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