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path: root/src/southbridge/intel
AgeCommit message (Expand)Author
2008-10-29i945/ICH7: Use #defines from pci_ids.h (trivial).Uwe Hermann
2008-10-29Support for the Intel ICH7 southbridge.Stefan Reinauer
2008-09-03Tidy up identifiers, per Uwe's suggestion. Trivial.Ed Swierk
2008-08-25This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,Ed Swierk
2008-08-25This patch modifies the Intel 3100 southbridge code to recognize theEd Swierk
2008-05-07Implement GPIO configuration routines for the Intel 3100 southbridge,Ed Swierk
2008-04-30By default, the Intel 3100 LPC interface enables only I/O range 0x3f8Ed Swierk
2008-04-06This patch halts the tco timer early in the boot process on all ICH series so...Joseph Smith
2008-04-01Setting an integrated southbridge device (like SATA or USB2.0) toEd Swierk
2008-04-01Remove i82801DB files that I meant to delete in r3206.Joseph Smith
2008-04-01Tiny style fix for consistency (trivial).Ed Swierk
2008-04-01Removal of i82801DB (ICH4)Joseph Smith
2008-04-01The early init code of several Intel southbridge chipsets callsEd Swierk
2008-03-30Like other Intel chipsets, the Intel 3100 has a TCO timer that rebootsEd Swierk
2008-03-16Here is an updated patch addressing most of Uwe's and Peter's ...Ed Swierk
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
2007-11-30Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):Uwe Hermann
2007-11-29Restructure/rename/comment a few 82371XX-related PCI IDs (trivial).Uwe Hermann
2007-11-07Add initial support for all known ICH* southbridges to theUwe Hermann
2007-11-07Add PCI IDs for most Intel southbridges of the 82801 seriesUwe Hermann
2007-11-04Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up toUwe Hermann
2007-10-30Various fixes and improvements of the 82801xx code.Joseph Smith
2007-10-24smaller changes to silence build warnings. (trivial)Stefan Reinauer
2007-10-24Ever wondered where those "setting incorrect section attributes forStefan Reinauer
2007-10-01Thee lines in i82801xx_pci.c need to be removed. They cause theJoseph Smith
2007-06-19Various minor cosmetics and coding style fixes (trivial).Uwe Hermann
2007-06-14Small bugfix in i82801xx_lpc.c.Corey Osgood
2007-06-14This patch adds support for the Intel i82810 northbridge and various i82801xxCorey Osgood
2007-06-03Intel 82371EB: Some code simplifications (trivial).Uwe Hermann
2007-05-29Intel 82371EB: Add IDE init support.Uwe Hermann
2007-05-27Init for the Intel 82371EB southbridge: make all ROM/BIOS regionsUwe Hermann
2007-05-03Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,Uwe Hermann
2006-12-28A patch to add initial support for the i82801db southbridge basedJon Dufresne
2006-12-14In the file mainboard/intel/i82801dbm/i82801dbm.c the variableJon Dufresne
2006-12-14In src/southbridge/intel/i82801ca, first the smbus registers are mapped at i/ochn
2006-11-05Use the canonical name of the vendors/devices and theUwe Hermann
2006-08-23Uwe Hermann:Stefan Reinauer
2006-08-04final rename orgy. sorry for the inconvenience. This should fix it againStefan Reinauer
2006-08-04ouch. it's 8_2_371. I'll fix it. This commit breaks compilationStefan Reinauer
2006-08-04rename southbridge i440bx to its actual name i8371ebStefan Reinauer
2006-07-30- Fix some copy bugs and thinkos in the i440bx SMbusRichard Smith
2006-07-24add framework for i440bx chipsetRichard Smith
2006-04-06interesting behavior, i thought svn could do moves. Stefan Reinauer
2006-04-06break the tree really quick due to svn restrictions, next commit fill fix itStefan Reinauer
2005-09-21Bug fixes: read all 16 bits of DMA configuration; set up NMI/SERR handling in...Steven J. Magnani
2005-09-21Bug fixes: read all 16 bits of DMA configuration; set up NMI/SERR handling in...Steven J. Magnani
2005-09-21Bug fix: enable secondary IDE only if enable_b is set.Steven J. Magnani
2005-09-21Bug fix: enable secondary IDE only if enable_b is set.Steven J. Magnani
2005-09-21Rewrite i82801er_enable to do nothing if device does not have an enable/disab...Steven J. Magnani
2005-09-21Rewrite i82801dbm_enable to do nothing if device does not have an enable/disa...Steven J. Magnani
2005-09-14Initial revision.Steven J. Magnani
2005-09-14Cleanup. Only functional change is to drop hard-coding of vendor/subsystem ID.Steven J. Magnani
2005-09-14Add some P64H2-specific definitions, remove some generic PCI ones.Steven J. Magnani
2005-07-08eric patchYinghai Lu
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)
2004-11-28fixes to make adl855pc compile.Ronald G. Minnich
2004-11-11in loglevel.h, if ASM_CONSOLE_LOGLEVEL is defined, don't try to set it.Ronald G. Minnich
2004-11-04- Update abuild.sh so it will rebuild successfull buildsEric Biederman
2004-11-02*** empty log message ***Yinghai Lu
2004-10-27sizeram removal/conversion.Eric Biederman
2004-10-22*** empty log message ***Yinghai Lu
2004-10-22- kill typo so resources are not mixed up in amdk8/northbridge.cEric Biederman
2004-10-21- Bump the LinuxBIOS major versionEric Biederman
2004-10-16- Make all ports use config.h for if they have chip_config or chip_info struc...Eric Biederman
2004-10-16- First stab at running linuxbios without the old static device tree.Eric Biederman
2004-09-30digital logic stuff, fixes for the smbus code in 82801dbmRonald G. Minnich
2004-08-25changes for the dbm part. Still need to remove the sata file ...Ronald G. Minnich
2004-08-24compiles.Ronald G. Minnich
2004-08-24new intel io hub.Ronald G. Minnich
2004-07-01Intel E7501 P64H2 ICH5R supportYinghai Lu
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