aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/smbus.c
AgeCommit message (Expand)Author
2020-12-11sb/intel/x/smbus.c: Factor out common codeAngel Pons
2020-12-10sb/intel/x/smbus.c: Add block read/write supportAngel Pons
2020-11-24sb/intel/lynxpoint: Replace hard-coded IDs with definesFelix Singer
2020-11-22sb/intel/lynxpoint/smbus.c: Remove invalid PCI IDsAngel Pons
2020-10-24sb/intel/lynxpoint: Use spaces around `|`Angel Pons
2020-08-07sb/intel/lynxpoint: Use PCI bitwise opsAngel Pons
2020-07-20sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASEAngel Pons
2020-06-06src: Use pci_dev_ops_pci where applicableAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-04src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-09sb/intel/common: Add smbus_set_slave_addr()Kyösti Mälkki
2020-01-09device,sb/intel: Move SMBus host controller prototypesKyösti Mälkki
2019-03-21{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik
2018-11-01sb/intel/lynxpoint: Add a PCI ID for an SMBus controllerTristan Corrick
2018-10-18src/{sb/intel,mb/google/auron}: Don't use device_tElyes HAOUAS
2017-08-06sb/intel/*: Use common SMBus functionsArthur Heymans
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-06-04devicetree: Discriminate device ops scan_bus()Kyösti Mälkki
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2013-12-21lynxpoint: Add LPT-LP device id and smbus_write_byteDuncan Laurie
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin