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path: root/src/southbridge/intel/lynxpoint/pcie.c
AgeCommit message (Expand)Author
2024-06-09sb/intel/lynxpoint/pcie.c: Add 9-series PCH-H device IDsAngel Pons
2024-04-16sb/intel/lynxpoint: Fix AER and L1 sub-state reportingAngel Pons
2024-04-16sb/intel/lynxpoint/pcie.c: Fix 0xf5 register maskAngel Pons
2024-04-16lynxpoint/broadwell: Correct L1 exit latency with ASPMAngel Pons
2024-04-14lynxpoint/broadwell: Correct PCH-LP PCIe ASPM checkAngel Pons
2024-04-11tree: Remove blank lines before '}' and after '{'Elyes Haouas
2023-02-01treewide: Remove duplicated include <device/pci.h>Elyes Haouas
2022-11-30/: Remove extra space after commaElyes Haouas
2022-03-07src: Make PCI ID define names shorterFelix Singer
2022-01-04sb/intel: Use `bool` for PCIe coalescing optionAngel Pons
2020-11-24sb/intel/lynxpoint: Replace hard-coded IDs with definesFelix Singer
2020-11-07sb/intel/lynxpoint/pcie.c: Ensure OBFF is disabledAngel Pons
2020-10-24sb/intel/lynxpoint/pcie: Fix clock gating routineAngel Pons
2020-10-14haswell/lynxpoint: Align cosmetics with BroadwellAngel Pons
2020-10-12sb/intel/lynxpoint/pcie.c: fix typo in commentMatt DeVillier
2020-10-12sb/intel/lynxpoint: Set PCIe L1 substates capabilities registerMatt DeVillier
2020-10-12sb/intel/lynxpoint: Enable/disable AER via KconfigMatt DeVillier
2020-08-18src: Remove unused 'include <stddef.h>Elyes HAOUAS
2020-08-12sb/intel/lynxpoint: Move IOBP API to its own compilation unitAngel Pons
2020-08-07sb/intel/lynxpoint: Use PCI bitwise opsAngel Pons
2020-08-07sb/intel/lynxpoint: Consider root ports being disabled by strapAngel Pons
2020-07-28src: Never set ISA Enable on PCI bridgesAngel Pons
2020-07-09sb/intel/lynxpoint/pcie.c: Drop dead codeAngel Pons
2020-06-06src: Use pci_dev_ops_pci where applicableAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-01sb/intel/lynxpoint: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-04-04src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2019-10-30src/southbridge: change "unsigned" to "unsigned int"Martin Roth
2019-10-01intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki
2019-08-21southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki
2019-03-21{northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()Subrata Banik
2019-01-03sb/intel/lynxpoint/pcie.c: Add more checks for NULL pointersTristan Corrick
2018-12-28sb/intel/lynxpoint: Handle H81 only having 6 PCIe root portsTristan Corrick
2018-12-07sb/intel/lynxpoint/pcie.c: Fix a mistake in a commentTristan Corrick
2018-06-09sb/intel/lynxpoint: Get rid of device_tElyes HAOUAS
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2017-07-10southbridge/intel/lynxpoint: Fix undefined behaviorRyan Salsamendi
2017-07-02southbridge/intel/lynxpoint: Fix undefined behaviorRyan Salsamendi
2016-12-06PCI ops: Define read-modify-write routines globallyKyösti Mälkki
2016-02-23southbridge/intel/lynxpoint: Use common gpio.cPatrick Rudolph
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2013-12-21haswell: Misc updates from 1.6.1 ref codeDuncan Laurie
2013-12-21lynxpoint: Add devicetree config option to force enable ASPMDuncan Laurie
2013-12-05lynxpoint: enable clock gatingAaron Durbin
2013-12-05lynxpoint: implement additional programming stepsStefan Reinauer
2013-12-05lynxpoint: disable pcie devices based on configAaron Durbin
2013-12-02lynxpoint: move all pcie device handling to pcie.cAaron Durbin
2013-08-01intel/lynxpoint: remove explicit pcie config accessesKyösti Mälkki
2013-03-14lynxpoint: Update device IDs and clock gating setupDuncan Laurie
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin