coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-10-30	src/southbridge: change "unsigned" to "unsigned int"	Martin Roth
2019-05-03	{soc, southbridge} : Correct typo in comment	Frans Hendriks
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-01-06	device: Use pcidev_on_root()	Kyösti Mälkki
2018-12-28	sb/intel/lynxpoint: Handle H81 only having 6 PCIe root ports	Tristan Corrick
2018-12-07	src/southbridge: Get rid of device_t	Elyes HAOUAS
2018-10-18	src/{sb/intel,mb/google/auron}: Don't use device_t	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2013-12-05	lynxpoint: disable pcie devices based on config	Aaron Durbin
2013-12-02	lynxpoint: move all pcie device handling to pcie.c	Aaron Durbin
2013-12-02	lynxpoint: expose pch_disable_devfn()	Aaron Durbin
2013-12-02	lynxpoint: expose iobp functions	Aaron Durbin
2013-11-25	lynxpoint: Enable SerialIO clock in PCI mode	Duncan Laurie
2013-03-22	Fix compilation of Intel LynxPoint based boards	Stefan Reinauer
2013-03-21	lynxpoint: Add helper functions for reading PM and GPIO base	Duncan Laurie
2013-03-21	lynxpoint: Add function for checking for LP chipset	Duncan Laurie
2013-03-17	lynxpoint: Add support for disabling ULT devices	Duncan Laurie
2013-03-14	haswell: more ULT/LP support and minor tweaks	Duncan Laurie
2013-03-14	lynxpoint: Update IOBP programming method	Duncan Laurie
2013-03-14	haswell: Add initial support for Haswell platforms	Aaron Durbin