| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-11-01 | src: Add missing include <stdint.h> | Elyes HAOUAS |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2014-07-11 | intel/lynxpoint: Allow to always route USB3 ports to XHCI | Stefan Reinauer |
| 2014-07-04 | intel/lynxpoint: Add SATA DEVSLP disable option | Marc Jones |
| 2013-12-21 | lynxpoint: Add configuration option for SATA gen3 DTLE registers | Shawn Nematbakhsh |
| 2013-12-21 | lynxpoint: Add devicetree config option to force enable ASPM | Duncan Laurie |
| 2013-12-21 | lynxpoint: me: Support ICC clock enables message | Duncan Laurie |
| 2013-04-01 | lynxpoint: Basic configuration of SerialIO devices | Duncan Laurie |
| 2013-03-21 | haswell/lynxpoint: Use new PCH/PM helper functions | Duncan Laurie |
| 2013-03-14 | lynxpoint: Update device IDs and clock gating setup | Duncan Laurie |
| 2013-03-14 | haswell: Add initial support for Haswell platforms | Aaron Durbin |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |