coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-04-11	sb/intel/x/smbus.c: Correct register access width	Angel Pons
2020-12-11	sb/intel/x/smbus.c: Factor out common code	Angel Pons
2020-12-10	sb/intel/x/smbus.c: Add block read/write support	Angel Pons
2020-12-10	sb/intel/x/smbus.c: Rename parameter	Angel Pons
2020-10-20	sb/intel/ibexpeak: Align to coreboot's coding style	Angel Pons
2020-08-17	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	Elyes HAOUAS
2020-07-20	sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE	Angel Pons
2020-06-06	src: Use pci_dev_ops_pci where applicable	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-20	sb/ibexpeak: Use macros instead of hard-coded IDs	Felix Singer
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2020-01-09	sb/intel/common: Add smbus_set_slave_addr()	Kyösti Mälkki
2020-01-09	device,sb/intel: Move SMBus host controller prototypes	Kyösti Mälkki
2019-03-21	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	Subrata Banik
2018-11-16	src: Remove unneeded include <console/console.h>	Elyes HAOUAS
2018-05-18	sb/intel/ibexpeak: Get rid of device_t	Elyes HAOUAS
2017-08-06	sb/intel/*: Use common SMBus functions	Arthur Heymans
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-06-04	devicetree: Discriminate device ops scan_bus()	Kyösti Mälkki
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-02-01	ibexpeak: add smbus_write_byte	Vladimir Serbinenko
2013-11-25	Support for Ibexpeak southbridge	Vladimir Serbinenko
2013-06-13	Revert "Add support for Intel Ibex Peak (Mobile 5) southbridge"	Stefan Reinauer
2013-06-12	Add support for Intel Ibex Peak (Mobile 5) southbridge	Stefan Reinauer