| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-08-19 | i82801dx/gx/ix/jx: Add low-memory backup for S3 path | Kyösti Mälkki |
| 2017-08-10 | sb/intel/i82801jx: Remove dead code | Arthur Heymans |
| 2017-08-07 | sb/intel/i82801jx: Add romstage smbus and i2c block operations | Arthur Heymans |
| 2017-08-06 | sb/intel/*: Use common SMBus functions | Arthur Heymans |
| 2017-07-25 | sb/intel/i82801jx: Add Interrupt pin and routing RCBA offsets macros | Arthur Heymans |
| 2017-07-25 | sb/intel/i82801jx: Route all PIRQ to INT11 | Arthur Heymans |
| 2017-07-24 | sb/intel/i82801jx: Generate default fadt and madt | Arthur Heymans |
| 2017-07-23 | sb/intel/i82801jx: Add function to detect s3 resume | Arthur Heymans |
| 2017-07-23 | sb/intel/i82801jx: Add addition IO resources | Arthur Heymans |
| 2017-07-21 | I82801JX: Add IS_ENABLED around config options | Martin Roth |
| 2017-07-21 | sb/intel/i82801jx: Add correct PCI ids and change names | Arthur Heymans |
| 2017-07-21 | sb/intel/i82801jx: Copy i82801ix | Arthur Heymans |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |