index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
southbridge
/
intel
/
i82801jx
/
pcie.c
Age
Commit message (
Expand
)
Author
2021-03-07
sb/intel/common/pciehp: Replace HP dummy device with common code
Arthur Heymans
2020-07-28
src: Never set ISA Enable on PCI bridges
Angel Pons
2020-06-12
sb/intel/i82801jx: Use PCI bitwise ops
Angel Pons
2020-06-06
src: Use pci_dev_ops_pci where applicable
Angel Pons
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-01
sb/intel/i82801jx: Fix 16-bit read/write PCI_COMMAND register
Elyes HAOUAS
2020-04-04
src/southbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2019-10-01
intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL
Kyösti Mälkki
2019-03-21
{northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()
Subrata Banik
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2018-05-24
sb/intel/i82801jx: Get rid of device_t
Elyes HAOUAS
2017-07-21
sb/intel/i82801jx: Add correct PCI ids and change names
Arthur Heymans
2017-07-21
sb/intel/i82801jx: Copy i82801ix
Arthur Heymans