coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-10-30	src/southbridge: change "unsigned" to "unsigned int"	Martin Roth
2019-08-21	southbridge/intel: Tidy up preprocessor and headers	Kyösti Mälkki
2019-04-13	sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB	Patrick Rudolph
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-02-01	sb/intel/common: Rename i2c_block_read() to i2c_eeprom_read()	Kyösti Mälkki
2019-01-14	sb/intel: Use common RCBA MACROs	Peter Lemenkov
2019-01-06	Kconfig: Unify power-after-failure options	Nico Huber
2018-10-15	sb/intel/i82801jx: Use macros for LPC_EN	Arthur Heymans
2018-08-14	sb/intel/i82801[ij]x: use (more) RCBA register names instead of magic numbers	Stefan Tauner
2018-06-21	sb/intel/i82801xx: Use common RCBA MACROs	Arthur Heymans
2018-01-05	nb/intel/x4x: Disable watchdog, halt TCO timer and clear timeout	Arthur Heymans
2017-08-10	sb/intel/i82801jx: Remove dead code	Arthur Heymans
2017-08-07	sb/intel/i82801jx: Add romstage smbus and i2c block operations	Arthur Heymans
2017-08-06	sb/intel/*: Use common SMBus functions	Arthur Heymans
2017-07-25	sb/intel/i82801jx: Add Interrupt pin and routing RCBA offsets macros	Arthur Heymans
2017-07-23	sb/intel/i82801jx: Add function to detect s3 resume	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Add correct PCI ids and change names	Arthur Heymans