| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-08-14 | sb/intel/i82801[ij]x: use (more) RCBA register names instead of magic numbers | Stefan Tauner |
| 2018-06-21 | sb/intel/i82801xx: Use common RCBA MACROs | Arthur Heymans |
| 2018-01-05 | nb/intel/x4x: Disable watchdog, halt TCO timer and clear timeout | Arthur Heymans |
| 2017-08-10 | sb/intel/i82801jx: Remove dead code | Arthur Heymans |
| 2017-08-07 | sb/intel/i82801jx: Add romstage smbus and i2c block operations | Arthur Heymans |
| 2017-08-06 | sb/intel/*: Use common SMBus functions | Arthur Heymans |
| 2017-07-25 | sb/intel/i82801jx: Add Interrupt pin and routing RCBA offsets macros | Arthur Heymans |
| 2017-07-23 | sb/intel/i82801jx: Add function to detect s3 resume | Arthur Heymans |
| 2017-07-21 | sb/intel/i82801jx: Add correct PCI ids and change names | Arthur Heymans |
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index : coreboot.git | |
| my copy of coreboot | User & |
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