coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2017-08-07	sb/intel/i82801jx: Add romstage smbus and i2c block operations	Arthur Heymans
	Change-Id: I76bf1ed392d3d18059792106fc482d2259a3f084 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/20880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-08-06	sb/intel/*: Use common SMBus functions	Arthur Heymans
	All Intel southbridges implement the same SMBus functions. This patch replaces all these similar and mostly identical implementations with a common file. This also makes i2c block read available to all those southbridges. If the northbridge has to read a lot of SPD bytes sequentially, using this function can reduce the time being spent to read SPD five-fold. Change-Id: I93bb186e04e8c32dff04fc1abe4b5ecbc4c9c962 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19258 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-21	sb/intel/i82801jx: Add correct PCI ids and change names	Arthur Heymans
	Change-Id: Ic9226098dafa2465aa5fccc72c442de2b94e44c7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19249 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-07-21	sb/intel/i82801jx: Copy i82801ix	Arthur Heymans
	Change-Id: I878960e7e0f992426382ca717b8b42787f01ebc6 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19248 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>