| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-01-14 | sb/intel: Use common RCBA MACROs | Peter Lemenkov |
| 2019-01-09 | cpu/intel: Use the common code to initialize the romstage timestamps | Arthur Heymans |
| 2017-11-23 | sb/intel/i82801jx: Store initial timestamp in bootblock | Arthur Heymans |
| 2017-07-21 | sb/intel/i82801jx: Add correct PCI ids and change names | Arthur Heymans |
| 2017-07-21 | sb/intel/i82801jx: Copy i82801ix | Arthur Heymans |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |