| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-04-13 | sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB | Patrick Rudolph |
| 2018-12-03 | nb/intel/x4x: Use common code for SMM in TSEG | Arthur Heymans |
| 2018-10-22 | intel: Use CF9 reset (part 1) | Patrick Rudolph |
| 2017-07-23 | sb/intel/i82801jx: Add function to detect s3 resume | Arthur Heymans |
| 2017-07-21 | sb/intel/i82801jx: Add correct PCI ids and change names | Arthur Heymans |
| 2017-07-21 | sb/intel/i82801jx: Copy i82801ix | Arthur Heymans |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |