coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-06-10	ACPI: Remove Kconfig COMMON_FADT	Kyösti Mälkki
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-08	southbridge/*/Kconfig: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-11-26	sb/intel/common/spi: Add Baytrail/Braswell support	Arthur Heymans
2019-11-18	sb/intel/common: Properly guard USB debug	Arthur Heymans
2019-11-15	nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-11-10	sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol	Arthur Heymans
2019-11-10	sb/intel/common: Make COMMON_RESET optional	Arthur Heymans
2019-11-10	sb/intel/common: Make linking rtc.c conditional	Arthur Heymans
2019-10-30	sb/intel/common: Make linking pmbase.c conditional	Arthur Heymans
2019-05-07	sb/{ICH7,NM10,PCH}: Use common watchdog_off function	Elyes HAOUAS
2019-04-13	sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB	Patrick Rudolph
2019-01-06	Kconfig: Unify power-after-failure options	Nico Huber
2018-12-03	sb/intel/i82801jx: Use common Intel SMM code	Arthur Heymans
2018-10-24	vboot: fix CONFIG_RESUME_PATH_SAME_AS_BOOT S3 resume logic	Joel Kitching
2018-10-22	intel: Use CF9 reset (part 1)	Patrick Rudolph
2018-09-13	src/*/intel: introduce warning when building with no IFD	Angel Pons
2018-09-13	src/*/intel/: clarify Kconfig options regarding IFD	Stefan Tauner
2018-06-29	sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables	Arthur Heymans
2017-12-10	sb/intel/i82801jx: Hook up spi code	Arthur Heymans
2017-08-06	sb/intel/*: Use common SMBus functions	Arthur Heymans
2017-07-24	sb/intel/i82801jx: Generate default fadt and madt	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Add correct PCI ids and change names	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Copy i82801ix	Arthur Heymans