| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-11-14 | sb/intel/i82801gx: Don't setup CIR when the northbridge is x4x | Arthur Heymans |
| 2019-11-14 | sb/intel/i82801gx: Add common early code | Arthur Heymans |
| 2019-11-13 | sb/intel/i82801gx: Add a function to set up BAR | Arthur Heymans |
| 2019-11-12 | sb/intel/i82801gx: Add common LPC decode code | Arthur Heymans |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |