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path: root/src/southbridge/intel/i82371eb
AgeCommit message (Expand)Author
2010-10-28Add IOAPIC support for Intel 82371EB and fixup SMP on ASUS P2B-D.Uwe Hermann
2010-10-12We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.Uwe Hermann
2010-10-11Fix typo after r5925.Sylvain Hitier
2010-10-09Remove various .c #includes from Intel 440BX/82371EB boards.Uwe Hermann
2010-10-07Convert all Intel 82371AB/EB/MB based boards to TINY_BOOTBLOCK.Uwe Hermann
2010-10-06Convert all Intel 440BX boards to Cache-as-RAM (CAR).Uwe Hermann
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-09-19Make ASUS P3B-F RAM init actually work by enabling SPD access.Uwe Hermann
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
2010-03-31Drop \r\n and \n\r as both print_XXX and printk now do this internally.Stefan Reinauer
2010-03-28drop __ROMCC__ define checks.. __PRE_RAM__ is what the code should be looking...Stefan Reinauer
2010-03-22printk_foo -> printk(BIOS_FOO, ...)Stefan Reinauer
2010-02-07newconfig is no more.Patrick Georgi
2010-01-18Move all IOAPIC selection to southbridges, and remove themPatrick Georgi
2009-11-06Split the two usages of __ROMCC__:Myles Watson
2009-10-27Improve coreboot build output and eliminate some warnings:Uwe Hermann
2009-10-27Add few missing prototypes, and remove few unused (thus lonelly) variables.Maciej Pijanka
2009-10-09Remove default n statements to simplify .config and ldoptions files.Myles Watson
2009-10-09More kconfig cleanups:Uwe Hermann
2009-10-04The new CBFS based build system requires the whole ROM to be accessibleUwe Hermann
2009-09-25some progress on kconfig:Patrick Georgi
2009-08-25Various Kconfig and Makefile.inc fixes and cosmetics.Uwe Hermann
2009-08-12Kconfig!Patrick Georgi
2009-07-02Move the v3 resource allocator to v2.Myles Watson
2009-05-11This patch adds high table support to qemu. It was already added toMyles Watson
2009-04-06(trivial) fix some warningsStefan Reinauer
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
2007-11-30Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):Uwe Hermann
2007-11-29Restructure/rename/comment a few 82371XX-related PCI IDs (trivial).Uwe Hermann
2007-10-24Ever wondered where those "setting incorrect section attributes forStefan Reinauer
2007-06-03Intel 82371EB: Some code simplifications (trivial).Uwe Hermann
2007-05-29Intel 82371EB: Add IDE init support.Uwe Hermann
2007-05-27Init for the Intel 82371EB southbridge: make all ROM/BIOS regionsUwe Hermann
2007-05-03Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,Uwe Hermann
2006-08-04final rename orgy. sorry for the inconvenience. This should fix it againStefan Reinauer
2006-08-04ouch. it's 8_2_371. I'll fix it. This commit breaks compilationStefan Reinauer
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