summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/fsp_rangeley
AgeCommit message (Expand)Author
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-27kbuild: automatically include southbridgesStefan Reinauer
2015-04-24fsp: Move fsp to fsp1_0Marc Jones
2015-04-10southbridge/intel/fsp_rangeley/ : Spellcheck + Formattingnicky sielicki
2015-02-27x86: Fix pointer arithmetic regressions from MMIO changesKevin Paul Herbert
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2015-02-09Intel FSP platforms: Fix timestampsKyösti Mälkki
2015-01-06southbridge: Drop print_ implementation from non-romcc boardsStefan Reinauer
2015-01-05timestamps: Switch from tsc_t to uint64_tStefan Reinauer
2014-12-16CBMEM console: Fix boards with BROKEN_CAR_MIGRATEKyösti Mälkki
2014-12-09spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.Gabe Black
2014-12-09spi: Remove the spi_set_speed and spi_cs_is_valid functions.Gabe Black
2014-12-09fsp platfoms: add prototype & consolidate main entry-pointMartin Roth
2014-12-02Replace hlt with halt()Patrick Georgi
2014-11-28ACPI: Remove CBMEM TOC from GNVSKyösti Mälkki
2014-11-25intel: Remove IRQ1 from possible PIRQ assignemnt.Vladimir Serbinenko
2014-11-20Replace includes of build.h with version.hKyösti Mälkki
2014-11-08fsp_rangeley: Switch to per-device ACPIVladimir Serbinenko
2014-10-22cmos: Rename the CMOS related functions.Gabe Black
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
2014-08-18southbridge/intel/fsp_rangeley: fix to include irqroute.h twiceMartin Roth
2014-07-30southbridge/intel: Add fsp_rangeley supportMartin Roth
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 13:34:21 +0000