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path: root/src/southbridge/intel/fsp_rangeley
AgeCommit message (Expand)Author
2017-01-12sb/intel/fsp_rangeley: Fix NULL check in gpio.cMartin Roth
2017-01-12fsp 1.0 systems: Check for NULL when saving HobListPtrMartin Roth
2016-12-23spi: Get rid of SPI_ATOMIC_SEQUENCINGFurquan Shaikh
2016-12-06intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki
2016-12-05spi: Define and use spi_ctrlr structureFurquan Shaikh
2016-12-05spi: Pass pointer to spi_slave structure in spi_setup_slaveFurquan Shaikh
2016-12-05spi: Fix parameter types for spi functionsFurquan Shaikh
2016-12-04spi_flash: Move spi flash opcodes to spi_flash.hFurquan Shaikh
2016-10-07src/southbridge: Remove whitespace after sizeofElyes HAOUAS
2016-09-10southbridge/intel/fsp_rangeley: transition away from device_tAntonello Dettori
2016-08-31src/southbridge: Code formatingElyes HAOUAS
2016-08-28src/southbridge: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-23src/southbridge: Remove unnecessary whitespace before "\n" and "\t"Elyes HAOUAS
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-07-15southbridge/intel/fsp_rangeley: use common Intel ACPI hardware definitionsAaron Durbin
2016-07-06PCI: Use PCI_DEVFN macro instead of DEV_FUNCWerner Zeh
2016-06-29intel romstage: Use run_ramstage()Kyösti Mälkki
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2015-12-06intel/fsp_rangeley: change non-existent config options to #definesMartin Roth
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-14Revert "Remove FSP Rangeley SOC and mohonpeak board support"Martin Roth
2015-10-03Remove FSP Rangeley SOC and mohonpeak board supportAlexandru Gagniuc
2015-09-29intel: auto include intel/common/firmwareAaron Durbin
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-07Drop "See file CREDITS..." commentStefan Reinauer
2015-06-23southbridge/intel: Create common IFD Kconfig and MakefileMartin Roth
2015-06-05device_ops: add device_t argument to acpi_inject_dsdt_generatorAlexander Couzens
2015-06-04devicetree: Discriminate device ops scan_bus()Kyösti Mälkki
2015-05-21Kill ENABLE_TPM.Vladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-27kbuild: automatically include southbridgesStefan Reinauer
2015-04-24fsp: Move fsp to fsp1_0Marc Jones
2015-04-10southbridge/intel/fsp_rangeley/ : Spellcheck + Formattingnicky sielicki
2015-02-27x86: Fix pointer arithmetic regressions from MMIO changesKevin Paul Herbert
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2015-02-09Intel FSP platforms: Fix timestampsKyösti Mälkki
2015-01-06southbridge: Drop print_ implementation from non-romcc boardsStefan Reinauer
2015-01-05timestamps: Switch from tsc_t to uint64_tStefan Reinauer
2014-12-16CBMEM console: Fix boards with BROKEN_CAR_MIGRATEKyösti Mälkki
2014-12-09spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.Gabe Black
2014-12-09spi: Remove the spi_set_speed and spi_cs_is_valid functions.Gabe Black
2014-12-09fsp platfoms: add prototype & consolidate main entry-pointMartin Roth
2014-12-02Replace hlt with halt()Patrick Georgi
2014-11-28ACPI: Remove CBMEM TOC from GNVSKyösti Mälkki
2014-11-25intel: Remove IRQ1 from possible PIRQ assignemnt.Vladimir Serbinenko
2014-11-20Replace includes of build.h with version.hKyösti Mälkki
2014-11-08fsp_rangeley: Switch to per-device ACPIVladimir Serbinenko
2014-10-22cmos: Rename the CMOS related functions.Gabe Black
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
2014-08-18southbridge/intel/fsp_rangeley: fix to include irqroute.h twiceMartin Roth
2014-07-30southbridge/intel: Add fsp_rangeley supportMartin Roth
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