Age | Commit message (Expand) | Author |
---|---|---|
2016-06-29 | intel romstage: Use run_ramstage() | Kyösti Mälkki |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-10-14 | Revert "Remove FSP Rangeley SOC and mohonpeak board support" | Martin Roth |
2015-10-03 | Remove FSP Rangeley SOC and mohonpeak board support | Alexandru Gagniuc |
2015-09-24 | coreboot: move TS_END_ROMSTAGE to one spot | Aaron Durbin |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-04-24 | fsp: Move fsp to fsp1_0 | Marc Jones |
2015-02-15 | x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer | Kevin Paul Herbert |
2015-02-09 | Intel FSP platforms: Fix timestamps | Kyösti Mälkki |
2015-01-05 | timestamps: Switch from tsc_t to uint64_t | Stefan Reinauer |
2014-12-16 | CBMEM console: Fix boards with BROKEN_CAR_MIGRATE | Kyösti Mälkki |
2014-07-30 | southbridge/intel: Add fsp_rangeley support | Martin Roth |