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path: root/src/southbridge/amd/cs5536/cs5536.c
AgeCommit message (Expand)Author
2007-06-19The GPIOs used for UART2 RX and TX were reversed.Marc Jones
2007-06-02The UART disable code was causing a hang and was worked around with aMarc Jones
2007-05-22Add missing license headers, minor cosmetic fixes in existing headers.Uwe Hermann
2007-05-10This fix properly hides the UDC and OTG PCI headers when the cs5536 isMarc Jones
2007-05-10This patch cleans up and clarifies Geode source code comments.Marc Jones
2007-05-10Fix the indent and whitespace to match LinuxBIOS standardsJordan Crouse
2007-05-05With this patch, the msm800sev runs FILO and boots a kernel.Ronald G. Minnich
2007-05-04This patch re-implements support for the CS5536 companion chip for theMarc Jones
2006-11-05Use the canonical name of the vendors/devices and theUwe Hermann
2006-08-28- Much better USB P4 fix. Richard Smith
2006-08-25- USB P4 as host fixRichard Smith
2006-08-25- fix a silly pointer dereference thinko in my previous commitRichard Smith
2006-08-25- Added suport for enabling USB P4 on the olpcRichard Smith
2006-07-21restore the old code for enabling flash. The new amd code did not work.Ronald G. Minnich
2006-07-21These changes incorporate steve goodrich'es fixes, and one bug that isRonald G. Minnich
2006-06-27changes per steve goodrich.Ronald G. Minnich
2006-06-22set up interrupt values for the southbridge, and add a function toRonald G. Minnich
2006-06-18fix idiiot typo I did not catch.Ronald G. Minnich
2006-05-16Commit for IDE NAND FLASHRonald G. Minnich
2006-05-02Fall back to pre-broken settings and setup for GX2. Ronald G. Minnich
2006-04-27we don't need msr_initRonald G. Minnich
2006-04-25builds and should do the right things for sb for interrupt routing.Ronald G. Minnich
2006-04-25to give ollie a look.Ronald G. Minnich
2006-04-20add cs5536Li-Ta Lo
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