summaryrefslogtreecommitdiff
path: root/src/southbridge/amd/cimx
AgeCommit message (Expand)Author
2012-12-12Fix SPI BAR special case in lpc_set_resourcesMartin Roth
2012-12-12Claim the SPI bus before writes if the IMC ROM is presentMartin Roth
2012-11-30AMD S3: Leverage the public SPI routineZheng Bao
2012-11-28Remove assembly coded log2 functionRonald G. Minnich
2012-11-27Enable the FCH GPP port prior to device enumerationDave Frodin
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-09Get rid of hard coded strings in ACPI tablesStefan Reinauer
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-09-19cimx sb700: change Platform.h to remove some warningsSiyuan Wang
2012-08-30AMD S3: The offset of the nv storage depends on config.hZheng Bao
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2012-08-05AMD SB: Call the rtc update if needed (Propagation)zbao
2012-07-03AGESA F15 wrapper for Trinityzbao
2012-06-12Update SB800 CIMX FADTMartin Roth
2012-05-24cbtypes.h: Unify cbtypes.h used in AMD board's codeVikram Narayanan
2012-05-15Fix fadt legacy free setting.Marc Jones
2012-05-12Add legacy free setting and override to fadt.cMarc Jones
2012-05-12Merge sb800 fadt fixes from South Station mainboard to southbridge fadt.Marc Jones
2012-05-10Unmark source files as executablesAlec Ari
2012-05-09Move fadt.c to the cimx sb800 southbridge directory to be shared.Marc Jones
2012-05-09Add simple PMIO & PMIO2 read/write routines to CIMX wrapperMartin Roth
2012-05-08Clean up #ifsPatrick Georgi
2012-04-12Add Southbridge support for S3.zbao
2012-04-12Unify IO APIC address specificationPatrick Georgi
2012-04-02Add sb800 spi support.zbao
2012-02-16SB700 southbridge: AMD SB700/SP5100 southbridge CIMX wrapperKerry Sheh
2012-02-02CIMX wrapper: remove redudant traversing sb800 and sb900 CIMX dirKerry Sheh
2011-12-21Persimmon audio codec verb patch.Marc Jones
2011-11-01remove trailing whitespaceStefan Reinauer
2011-10-23SB800: Hide unused gpp portsKerry Sheh
2011-10-14Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6Stefan Reinauer
2011-10-12SB800 RAID: add kconfig option RAID_MISC_ROM_POSITIONKerry Sheh
2011-10-12SB800: Sata Enable bus master and enable ahci for AHCI/RAID modeKerry Sheh
2011-10-12sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODEKerry Sheh
2011-10-11mainboard: complete the sb800 devicetree even device is offKerry Sheh
2011-10-11sb800: Add sata ahci/raid mode kconfig optionKerry Sheh
2011-09-15AMD SB800 early console use fixefdesign98
2011-09-07AMD SB800 southbridge updateKerry She
2011-09-07AMD F14 southbridge updateKerry She
2011-07-14Move AMD SB800 early clock setup.Scott Duplichan
2011-07-14Set SB800 ROM decode size based on kconfig.Marc Jones
2011-06-29amd southbirdge sb800 wrapper, pci bridge fixKerry She
2011-06-28Addition of Family12/SB900 wrapper codeefdesign98
2011-06-22Rename {CPU|NB|SB}/amd/*_wrapper foldersefdesign98
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 14:46:53 +0000