summaryrefslogtreecommitdiff
path: root/src/soc
AgeCommit message (Expand)Author
2021-01-14soc/intel/tgl: Add configurable value for UsbTcPortEnBrandon Breitenstein
2021-01-14soc/amd/picasso: Remove printf in aslRaul E Rangel
2021-01-14build system: Structure and serialize INTERMEDIATEPatrick Georgi
2021-01-14soc/amd/picasso/uart: add missing device/device.h includeFelix Held
2021-01-14soc/amd/cezanne: add remaining non-ACPI parts of UART supportFelix Held
2021-01-14soc/amd/cezanne: add AOAC supportFelix Held
2021-01-14soc/amd/cezanne: add console UART supportFelix Held
2021-01-14soc/amd/stoneyridge: use SOC_AMD_COMMON_BLOCK_UARTFelix Held
2021-01-14soc/amd/common/block/uart/Makefile: use all targetFelix Held
2021-01-14soc/amd/piasso/uart: move get_uart_base prototype to common code headerFelix Held
2021-01-14soc/amd/common/uart: move CONSOLE_UART_BASE_ADDRESS back to SoC codeFelix Held
2021-01-14soc/amd/picasso: remove broken and unused legacy UART supportFelix Held
2021-01-13soc/amd/picasso: Disable CBFS MCACHERaul E Rangel
2021-01-13ACPI: Have single call-site for acpi_inject_nvsa()Kyösti Mälkki
2021-01-13ACPI: Add common acpi_fill_gnvs()Kyösti Mälkki
2021-01-13soc/amd: Rename to soc_fill_gnvs()Kyösti Mälkki
2021-01-13soc/amd: Rename to pm_fill_gnvs()Kyösti Mälkki
2021-01-13soc/intel/tigerlake: Disable TC cold supportSrinidhi N Kaushik
2021-01-12soc/intel: rename uart_max_indexMichael Niewöhner
2021-01-12soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE`Angel Pons
2021-01-12soc/intel/common/pcie: Add helper function for getting mask of enabled portsFurquan Shaikh
2021-01-12soc/intel/alderlake: Add PCH ID 0x5182Subrata Banik
2021-01-11soc/intel/{icl,tgl,jsl,ehl}: add LPIT supportMichael Niewöhner
2021-01-11soc/intel/skl: add SLP_S0 residency register and enable LPIT supportMichael Niewöhner
2021-01-11soc/intel/cnl: add SLP_S0 residency register and enable LPIT supportMichael Niewöhner
2021-01-11acpi,soc/intel/common: add support for Intel Low Power Idle TableMichael Niewöhner
2021-01-11{soc,vc,mb}/intel: Drop support for Cannon Lake SoCFelix Singer
2021-01-11soc/amd/cezzane: Add a minimal chipset treeFurquan Shaikh
2021-01-11soc/intel/common/uart: Use simple(_s_) variants of PCI functionsFurquan Shaikh
2021-01-11soc/intel/uart: Drop SoC callback `soc_uart_console_to_device`Furquan Shaikh
2021-01-11soc/intel/cnl: Allow setting PCIe subsystem IDs after FSP-SJeremy Soller
2021-01-11soc/amd/picasso: Separate GPIO define into gpio_defs.hEric Lai
2021-01-11soc/intel/cannonlake: Enable wake from USB in S4Patrick Rudolph
2021-01-10soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik
2021-01-10soc/intel/broadwell: Use `mp_cpu_bus_init`Angel Pons
2021-01-10mb/google/cyan: Move board_id() to mainboard_fill_gnvs()Kyösti Mälkki
2021-01-10ACPI: Add missing include in nvs.hKyösti Mälkki
2021-01-10soc/intel: Rename to soc_fill_gnvs()Kyösti Mälkki
2021-01-10soc/intel: Replace acpi_init_gnvs()Kyösti Mälkki
2021-01-10mb/x/acpi_tables: Rename to mainboard_fill_gnvs()Kyösti Mälkki
2021-01-10sb/intel: Factor out soc_fill_gnvs()Kyösti Mälkki
2021-01-10ACPI: Replace uses of CBMEM_ID_ACPI_GNVSKyösti Mälkki
2021-01-10soc/intel/braswell: Refactor acpi_init_gnvs()Kyösti Mälkki
2021-01-10ACPI: Drop redundant ChromeOS setup for GNVSKyösti Mälkki
2021-01-10ACPI: Drop redundant CONSOLE_CBMEM setup in GNVSKyösti Mälkki
2021-01-10ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocationsKyösti Mälkki
2021-01-08soc/amd/picasso: add missing GNB I/O APIC initializationFelix Held
2021-01-08soc/intel/common/uart: Restrict scope of uart_common_init to uart.cFurquan Shaikh
2021-01-08soc/intel/common: Pass in pci_devfn_t into lpss_set_power_stateFurquan Shaikh
2021-01-08soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range()Furquan Shaikh
2021-01-08soc/intel/tigerlake: Enable USB2 port reset message on Type-C portsJohn Zhao
2021-01-08soc/amd/picasso: Generate GNB IO-APIC PCI routing tableRaul E Rangel
2021-01-08*/Makefile.inc: Add some INTERMEDIATE targets to .PHONYArthur Heymans
2021-01-08cbfstool: Use flock() when accessing CBFS filesJulius Werner
2021-01-08soc/intel/jasperlake: Update acoustic noise related parametersMaulik V Vaghela
2021-01-08soc/intel/jasperlake: Enable USB2 PHY SUS PG for s0ix qualificationKrishna Prasad Bhat
2021-01-07ACPI: Remove ACPI_NO_SMI_GNVSKyösti Mälkki
2021-01-07soc/amd/picasso: Add GRXS and GTXS methodEric Lai
2021-01-07soc/amd/picasso: Add STXS and CTXS methodEric Lai
2021-01-07arch/x86: Move prologue to .init sectionKyösti Mälkki
2021-01-07soc/intel/icelake: Remove unused ENABLE_DISPLAY_OVER_EXT_PCIE_GFXSubrata Banik
2021-01-07soc/intel/common/cse: Drop dependency on CHROMEOS for SOC_INTEL_CSE_LITE_SKUMatt DeVillier
2021-01-07soc/mediatek: rtc: Use `bool` as return typeYidi Lin
2021-01-06soc/intel/broadwell: Move MAX_CPUS from mb to SoCFelix Singer
2021-01-06soc/intel/skylake: Move MAX_CPUS from mb to SoCFelix Singer
2021-01-06soc/amd/picasso: Correctly populate the PCI interrupt line registerRaul E Rangel
2021-01-06soc/amd/picasso: Fix ACPI PCI routing tableRaul E Rangel
2021-01-06soc/amd/picasso/root_complex: add missing set_resourcesFelix Held
2021-01-06soc/amd/common/block/gpio_banks: fix sequence in gpio_outputFelix Held
2021-01-06soc/amd/common/block/gpio_banks: clear output enable in gpio_input_*Felix Held
2021-01-06soc/amd/common/block/gpio_banks: clear pull-up/down bits in gpio_inputFelix Held
2021-01-06soc/intel/alderlake: Update CPU microcode patch base address/sizeSubrata Banik
2021-01-04arch/x86: Pass GNVS as parameter to SMM moduleKyösti Mälkki
2021-01-04soc/intel/baytrail/southcluster.asl: Use consistent comment formattingMatt DeVillier
2021-01-04soc/intel/baytrail: add LPEA resources to southcluster.aslMatt DeVillier
2021-01-04soc/intel/apollolake: Hook up GMA ACPI brightness controlsMatt DeVillier
2021-01-03soc/intel: Drop indirect <soc/nvs.h> includeKyösti Mälkki
2021-01-03soc/intel: Replace <soc/nvs.h> with <soc/device_nvs.h>Kyösti Mälkki
2021-01-03sb,soc/intel: Convert some CONFIG(CHROMEOS) preprocessorKyösti Mälkki
2021-01-02soc/amd/picasso: Separate CPUID defs into new headerJason Glenesk
2021-01-01soc/intel/cnl: add panel and backlight configuration codeMichael Niewöhner
2021-01-01nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settingsMichael Niewöhner
2021-01-01soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representationMichael Niewöhner
2021-01-01soc/mediatek: dsi: Fix EoTp flagShaoming Chen
2020-12-31soc/intel/skylake: Remove device_nvs.hKyösti Mälkki
2020-12-31soc/mediatek/mt8192: Move flash_controller.c to common/Yidi Lin
2020-12-31soc/mediatek/mt8192: Add DDR mode register initHuayang Duan
2020-12-31soc/mediatek/mt8192: Do dramc duty calibrationHuayang Duan
2020-12-31soc/mediatek/mt8192: Add dramc 8 phase calibrationHuayang Duan
2020-12-31soc/mediatek/mt8192: Update initial settings of dramcHuayang Duan
2020-12-30drivers/intel/gma: Include gfx.asl by default for all platforms...Matt DeVillier
2020-12-30soc/intel/common: Move gfx.asl to drivers/intel/gmaMatt DeVillier
2020-12-30soc/mediatek/mt8192: eint: unmask eint event mask registerG.Pangao
2020-12-30soc/intel/cnl: add Kconfig values for GMA backlight registersMichael Niewöhner
2020-12-30soc/intel: hook up new gpio device in the soc chipsMichael Niewöhner
2020-12-29soc/intel/bdw,nb/intel/hsw: correct mask for panel power cycle delayMichael Niewöhner
2020-12-29soc/intel/alderlake: Update chipset.cb for TCSS and USBEric Lai
2020-12-29soc/intel/skylake: Add 4 missing root ports to chipset dtFelix Singer
2020-12-29sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurableArthur Heymans
2020-12-29soc/mediatek/mt8192: Implement dramc base settings for each frequencyHuayang Duan