| Age | Commit message (Expand) | Author |
|---|
| 2021-01-14 | soc/amd/picasso/uart: add missing device/device.h include | Felix Held |
| 2021-01-14 | soc/amd/cezanne: add remaining non-ACPI parts of UART support | Felix Held |
| 2021-01-14 | soc/amd/cezanne: add AOAC support | Felix Held |
| 2021-01-14 | soc/amd/cezanne: add console UART support | Felix Held |
| 2021-01-14 | soc/amd/stoneyridge: use SOC_AMD_COMMON_BLOCK_UART | Felix Held |
| 2021-01-14 | soc/amd/common/block/uart/Makefile: use all target | Felix Held |
| 2021-01-14 | soc/amd/piasso/uart: move get_uart_base prototype to common code header | Felix Held |
| 2021-01-14 | soc/amd/common/uart: move CONSOLE_UART_BASE_ADDRESS back to SoC code | Felix Held |
| 2021-01-14 | soc/amd/picasso: remove broken and unused legacy UART support | Felix Held |
| 2021-01-13 | soc/amd/picasso: Disable CBFS MCACHE | Raul E Rangel |
| 2021-01-13 | ACPI: Have single call-site for acpi_inject_nvsa() | Kyösti Mälkki |
| 2021-01-13 | ACPI: Add common acpi_fill_gnvs() | Kyösti Mälkki |
| 2021-01-13 | soc/amd: Rename to soc_fill_gnvs() | Kyösti Mälkki |
| 2021-01-13 | soc/amd: Rename to pm_fill_gnvs() | Kyösti Mälkki |
| 2021-01-13 | soc/intel/tigerlake: Disable TC cold support | Srinidhi N Kaushik |
| 2021-01-12 | soc/intel: rename uart_max_index | Michael Niewöhner |
| 2021-01-12 | soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE` | Angel Pons |
| 2021-01-12 | soc/intel/common/pcie: Add helper function for getting mask of enabled ports | Furquan Shaikh |
| 2021-01-12 | soc/intel/alderlake: Add PCH ID 0x5182 | Subrata Banik |
| 2021-01-11 | soc/intel/{icl,tgl,jsl,ehl}: add LPIT support | Michael Niewöhner |
| 2021-01-11 | soc/intel/skl: add SLP_S0 residency register and enable LPIT support | Michael Niewöhner |
| 2021-01-11 | soc/intel/cnl: add SLP_S0 residency register and enable LPIT support | Michael Niewöhner |
| 2021-01-11 | acpi,soc/intel/common: add support for Intel Low Power Idle Table | Michael Niewöhner |
| 2021-01-11 | {soc,vc,mb}/intel: Drop support for Cannon Lake SoC | Felix Singer |
| 2021-01-11 | soc/amd/cezzane: Add a minimal chipset tree | Furquan Shaikh |
| 2021-01-11 | soc/intel/common/uart: Use simple(_s_) variants of PCI functions | Furquan Shaikh |
| 2021-01-11 | soc/intel/uart: Drop SoC callback `soc_uart_console_to_device` | Furquan Shaikh |
| 2021-01-11 | soc/intel/cnl: Allow setting PCIe subsystem IDs after FSP-S | Jeremy Soller |
| 2021-01-11 | soc/amd/picasso: Separate GPIO define into gpio_defs.h | Eric Lai |
| 2021-01-11 | soc/intel/cannonlake: Enable wake from USB in S4 | Patrick Rudolph |
| 2021-01-10 | soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs | Subrata Banik |
| 2021-01-10 | soc/intel/broadwell: Use `mp_cpu_bus_init` | Angel Pons |
| 2021-01-10 | mb/google/cyan: Move board_id() to mainboard_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | ACPI: Add missing include in nvs.h | Kyösti Mälkki |
| 2021-01-10 | soc/intel: Rename to soc_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | soc/intel: Replace acpi_init_gnvs() | Kyösti Mälkki |
| 2021-01-10 | mb/x/acpi_tables: Rename to mainboard_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | sb/intel: Factor out soc_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | ACPI: Replace uses of CBMEM_ID_ACPI_GNVS | Kyösti Mälkki |
| 2021-01-10 | soc/intel/braswell: Refactor acpi_init_gnvs() | Kyösti Mälkki |
| 2021-01-10 | ACPI: Drop redundant ChromeOS setup for GNVS | Kyösti Mälkki |
| 2021-01-10 | ACPI: Drop redundant CONSOLE_CBMEM setup in GNVS | Kyösti Mälkki |
| 2021-01-10 | ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations | Kyösti Mälkki |
| 2021-01-08 | soc/amd/picasso: add missing GNB I/O APIC initialization | Felix Held |
| 2021-01-08 | soc/intel/common/uart: Restrict scope of uart_common_init to uart.c | Furquan Shaikh |
| 2021-01-08 | soc/intel/common: Pass in pci_devfn_t into lpss_set_power_state | Furquan Shaikh |
| 2021-01-08 | soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range() | Furquan Shaikh |
| 2021-01-08 | soc/intel/tigerlake: Enable USB2 port reset message on Type-C ports | John Zhao |
| 2021-01-08 | soc/amd/picasso: Generate GNB IO-APIC PCI routing table | Raul E Rangel |
| 2021-01-08 | */Makefile.inc: Add some INTERMEDIATE targets to .PHONY | Arthur Heymans |
| 2021-01-08 | cbfstool: Use flock() when accessing CBFS files | Julius Werner |
| 2021-01-08 | soc/intel/jasperlake: Update acoustic noise related parameters | Maulik V Vaghela |
| 2021-01-08 | soc/intel/jasperlake: Enable USB2 PHY SUS PG for s0ix qualification | Krishna Prasad Bhat |
| 2021-01-07 | ACPI: Remove ACPI_NO_SMI_GNVS | Kyösti Mälkki |
| 2021-01-07 | soc/amd/picasso: Add GRXS and GTXS method | Eric Lai |
| 2021-01-07 | soc/amd/picasso: Add STXS and CTXS method | Eric Lai |
| 2021-01-07 | arch/x86: Move prologue to .init section | Kyösti Mälkki |
| 2021-01-07 | soc/intel/icelake: Remove unused ENABLE_DISPLAY_OVER_EXT_PCIE_GFX | Subrata Banik |
| 2021-01-07 | soc/intel/common/cse: Drop dependency on CHROMEOS for SOC_INTEL_CSE_LITE_SKU | Matt DeVillier |
| 2021-01-07 | soc/mediatek: rtc: Use `bool` as return type | Yidi Lin |
| 2021-01-06 | soc/intel/broadwell: Move MAX_CPUS from mb to SoC | Felix Singer |
| 2021-01-06 | soc/intel/skylake: Move MAX_CPUS from mb to SoC | Felix Singer |
| 2021-01-06 | soc/amd/picasso: Correctly populate the PCI interrupt line register | Raul E Rangel |
| 2021-01-06 | soc/amd/picasso: Fix ACPI PCI routing table | Raul E Rangel |
| 2021-01-06 | soc/amd/picasso/root_complex: add missing set_resources | Felix Held |
| 2021-01-06 | soc/amd/common/block/gpio_banks: fix sequence in gpio_output | Felix Held |
| 2021-01-06 | soc/amd/common/block/gpio_banks: clear output enable in gpio_input_* | Felix Held |
| 2021-01-06 | soc/amd/common/block/gpio_banks: clear pull-up/down bits in gpio_input | Felix Held |
| 2021-01-06 | soc/intel/alderlake: Update CPU microcode patch base address/size | Subrata Banik |
| 2021-01-04 | arch/x86: Pass GNVS as parameter to SMM module | Kyösti Mälkki |
| 2021-01-04 | soc/intel/baytrail/southcluster.asl: Use consistent comment formatting | Matt DeVillier |
| 2021-01-04 | soc/intel/baytrail: add LPEA resources to southcluster.asl | Matt DeVillier |
| 2021-01-04 | soc/intel/apollolake: Hook up GMA ACPI brightness controls | Matt DeVillier |
| 2021-01-03 | soc/intel: Drop indirect <soc/nvs.h> include | Kyösti Mälkki |
| 2021-01-03 | soc/intel: Replace <soc/nvs.h> with <soc/device_nvs.h> | Kyösti Mälkki |
| 2021-01-03 | sb,soc/intel: Convert some CONFIG(CHROMEOS) preprocessor | Kyösti Mälkki |
| 2021-01-02 | soc/amd/picasso: Separate CPUID defs into new header | Jason Glenesk |
| 2021-01-01 | soc/intel/cnl: add panel and backlight configuration code | Michael Niewöhner |
| 2021-01-01 | nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings | Michael Niewöhner |
| 2021-01-01 | soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation | Michael Niewöhner |
| 2021-01-01 | soc/mediatek: dsi: Fix EoTp flag | Shaoming Chen |
| 2020-12-31 | soc/intel/skylake: Remove device_nvs.h | Kyösti Mälkki |
| 2020-12-31 | soc/mediatek/mt8192: Move flash_controller.c to common/ | Yidi Lin |
| 2020-12-31 | soc/mediatek/mt8192: Add DDR mode register init | Huayang Duan |
| 2020-12-31 | soc/mediatek/mt8192: Do dramc duty calibration | Huayang Duan |
| 2020-12-31 | soc/mediatek/mt8192: Add dramc 8 phase calibration | Huayang Duan |
| 2020-12-31 | soc/mediatek/mt8192: Update initial settings of dramc | Huayang Duan |
| 2020-12-30 | drivers/intel/gma: Include gfx.asl by default for all platforms... | Matt DeVillier |
| 2020-12-30 | soc/intel/common: Move gfx.asl to drivers/intel/gma | Matt DeVillier |
| 2020-12-30 | soc/mediatek/mt8192: eint: unmask eint event mask register | G.Pangao |
| 2020-12-30 | soc/intel/cnl: add Kconfig values for GMA backlight registers | Michael Niewöhner |
| 2020-12-30 | soc/intel: hook up new gpio device in the soc chips | Michael Niewöhner |
| 2020-12-29 | soc/intel/bdw,nb/intel/hsw: correct mask for panel power cycle delay | Michael Niewöhner |
| 2020-12-29 | soc/intel/alderlake: Update chipset.cb for TCSS and USB | Eric Lai |
| 2020-12-29 | soc/intel/skylake: Add 4 missing root ports to chipset dt | Felix Singer |
| 2020-12-29 | sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurable | Arthur Heymans |
| 2020-12-29 | soc/mediatek/mt8192: Implement dramc base settings for each frequency | Huayang Duan |
| 2020-12-28 | soc/intel/apl: Fix indents | Felix Singer |
| 2020-12-28 | soc/intel/xeon_sp: Lock PAM and SMRAM registers | Arthur Heymans |
| 2020-12-28 | soc/intel/xeon_sp: Lock down IIO DFX Global registers | Arthur Heymans |
