| Age | Commit message (Expand) | Author |
|---|
| 2022-10-14 | soc/amd/picasso: Clean up includes | Elyes Haouas |
| 2022-10-14 | soc/amd/sata.c: Hook up directly in devicetree | Arthur Heymans |
| 2022-10-14 | soc/amd/*: Hook up IOMMU ops in devicetree | Arthur Heymans |
| 2022-10-14 | soc/amd/*: Hook up LPC ops in devicetree | Arthur Heymans |
| 2022-10-14 | soc/amd/*: Hook up SMBus ops to devicetree | Arthur Heymans |
| 2022-10-14 | soc/amd: factor out common eMMC code | Felix Held |
| 2022-10-14 | soc/intel/alderlake: Create helper header file for UFS | Subrata Banik |
| 2022-10-14 | soc/intel/alderlake: Add UFS PCR ID | Subrata Banik |
| 2022-10-14 | soc/mediatek/mt8186: Add DEVAPC settings for ADSP | Tinghan Shen |
| 2022-10-14 | soc/mediatek/mt8186: Inititalize ADSP | Tinghan Shen |
| 2022-10-14 | soc/mediatek/mt8186: Add mtcmos power-on control for ADSP | Mandy Liu |
| 2022-10-14 | soc/mediatek/mt8186: Enable ADSP clock | Mandy Liu |
| 2022-10-14 | soc/intel/alderlake: Fix unknown voltage in SMBIOS | Zhixing Ma |
| 2022-10-14 | soc/intel/alderlake: Fix unknown max speed in SMBIOS | Zhixing Ma |
| 2022-10-14 | soc/amd/stoneyridge: move northbridge ops to northbridge device | Felix Held |
| 2022-10-14 | soc/amd/stoneyridge: use devicetree ops over pci driver | Felix Held |
| 2022-10-14 | soc/amd/stoneyridge: Hook up device_operations in chipset.cb | Felix Held |
| 2022-10-13 | soc/amd/stoneyridge: add chipset devicetrees | Felix Held |
| 2022-10-13 | soc/amd/*: Hook up GPU ops in devicetree | Arthur Heymans |
| 2022-10-13 | soc/amd/*: Hook up GPP bridges ops to devicetree | Arthur Heymans |
| 2022-10-13 | soc/amd/acp: Hook up ops in devicetree | Arthur Heymans |
| 2022-10-13 | soc/amd/morgana: Use devicetree ops over pci driver | Felix Held |
| 2022-10-13 | soc/amd/mendocino: Use devicetree ops over pci driver | Arthur Heymans |
| 2022-10-13 | soc/amd/cezanne: Use devicetree ops over pci driver | Arthur Heymans |
| 2022-10-13 | soc/amd/picasso: Use devicetree ops over pci driver | Arthur Heymans |
| 2022-10-13 | soc/amd/*: Hook up device_operations in chipset.cb | Arthur Heymans |
| 2022-10-13 | soc/amd/*: Move emmc disabling to device ops | Arthur Heymans |
| 2022-10-13 | payloads,src: Replace ALIGN(x, a) by ALIGN_UP(x, a) for clarity | Elyes Haouas |
| 2022-10-13 | soc/amd/*/psp_verstage/svc: Make svc.h macros common | Fred Reitberger |
| 2022-10-13 | soc/amd/cezanne: enable LPC decodes if platform uses LPC | Jeremy Soller |
| 2022-10-12 | soc/intel: Kconfig: Correct UART source clock value in comment | Wonkyu Kim |
| 2022-10-12 | Revert "soc/qualcomm: Update the wait time for checking PCIe link up" | Shelley Chen |
| 2022-10-12 | treewide: Use 'fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'pm2_cnt_len' for 'x_pm2_cnt_blk.bit_width' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'gpe0_blk' for 'x_gpe0_blk.addrl' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'gpe0_blk_len' for 'x_gpe0_blk.bit_width' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'fadt->pm_tmr_len' for 'x_pm_tmr_blk.bit_width' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'fadt->pm1_cnt_len' for 'x_pm1a_cnt_blk.bit_width' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'fadt->pm1_evt_len' for 'x_pm1a_evt_blk.bit_width' | Elyes Haouas |
| 2022-10-12 | soc/intel/ehl: Fix incorrect access to MAC_MDIO_DATA register | Mario Scheithauer |
| 2022-10-12 | soc/intel/ehl: Support maximum memory frequency selection | Christian Gmeiner |
| 2022-10-10 | soc/amd/common: Remove buildtime error for unknown cpu | Martin Roth |
| 2022-10-10 | soc/amd/morgana: Add initial commit for new SoC | Martin Roth |
| 2022-10-08 | soc/amd/mendocino/psp_verstage: Remove TODO comment | Karthikeyan Ramasubramanian |
| 2022-10-07 | soc/intel/apollolake: Add UFS Interrupt | Sean Rhodes |
| 2022-10-07 | soc/intel/apollolake: Remove SD Card interrupt for GLK | Sean Rhodes |
| 2022-10-07 | soc/intel/ehl: Set Ethernet controller to D0 power state | Mario Scheithauer |
| 2022-10-07 | soc/amd/{CZN,MDN,PCO}: Fix building with only single RW region | Matt DeVillier |
| 2022-10-07 | soc/amd/{stoney,picasso}/Kconfig: Fix guarding of amdfw | Matt DeVillier |
| 2022-10-07 | soc/intel/alderlake: Support Raptor Lake VR Fast VMODE | Jeremy Compostella |
| 2022-10-06 | treewide: use predicates to check for enabled pci devices | Fabio Aiuto |
| 2022-10-06 | soc/intel/apollolake/acpi: Add PCIEXBAR to MCHC | Sean Rhodes |
| 2022-10-06 | soc/intel/meteorlake: Make use of is_devfn_enabled() function | Sridhar Siricilla |
| 2022-10-06 | soc/qualcomm: Update the wait time for checking PCIe link up | Shelley Chen |
| 2022-10-06 | soc/intel/cmn/gfx: Add missing CML-U IGD device IDs | Michał Żygowski |
| 2022-10-04 | soc/intel/alderlake: Fix UFS OCP fabric timeout | Meera Ravindranath |
| 2022-10-02 | soc/amd/(common,mendocino)/psp_verstage: Pass PSP FW hash table | Kangheui Won |
| 2022-10-02 | soc/amd/mendocino: Add build rules to separate signed PSP/AMDFW | Karthikeyan Ramasubramanian |
| 2022-10-02 | soc/amd/common: Add a config to keep signed AMD/PSP FW separately | Karthikeyan Ramasubramanian |
| 2022-09-30 | soc/rockchip/rk3288/clock.c: Remove trailing semicolon | Elyes Haouas |
| 2022-09-30 | soc/nvidia/tegra210: Remove trailing semicolons | Elyes Haouas |
| 2022-09-30 | soc/nvidia/tegra124/sor.c: Remove trailing semicolon | Elyes Haouas |
| 2022-09-30 | soc/intel/adl: Add config option to enable FSP-S SATA test mode | Lean Sheng Tan |
| 2022-09-30 | soc/amd/common/psp_verstage/fch: use [read,write]8p to avoid typecasts | Felix Held |
| 2022-09-30 | soc/amd/common/block/smbus/smbus: use [read,write]8p to avoid typecasts | Felix Held |
| 2022-09-30 | soc/amd/common/block/spi/fch_spi_util: use [read,write][8,16,32]p | Felix Held |
| 2022-09-30 | soc/amd/common/block/lpc/espi_util: use [read,write][8,16,32]p | Felix Held |
| 2022-09-30 | soc/amd/cezanne,mendocino,picasso/uart: use write16p to avoid typecasts | Felix Held |
| 2022-09-30 | soc/amd/picasso/fch: use [read,write]8p to avoid typecasts | Felix Held |
| 2022-09-30 | soc/amd/stoneyridge/fch: use read[16,32]p to avoid typecasts | Felix Held |
| 2022-09-29 | treewide: use is_enabled_cpu() on cycles over device list | Fabio Aiuto |
| 2022-09-27 | sc7180: Update correct path of reset.h header file | Venkat Thogaru |
| 2022-09-27 | acpi/acpi_pm.c: refactor acpi_pm_state_for_* functions | Fabio Aiuto |
| 2022-09-26 | soc/mediatek/mt8186: Allow SCP to access H264 encoder | Runyang Chen |
| 2022-09-23 | soc/amd/mendocino: Add svc_set_fw_hash_table | Karthikeyan Ramasubramanian |
| 2022-09-22 | soc/common/lockdown: Guard sa_lock_pam | Sean Rhodes |
| 2022-09-22 | soc/intel/common/pch: Add a block specific to Apollo Lake | Sean Rhodes |
| 2022-09-22 | soc/amd/picasso: Add support for PSP NVRAM base addr and size | Ritul Guru |
| 2022-09-22 | common/block/fast_spi: Add extended BIOS window as reserved region | Werner Zeh |
| 2022-09-22 | soc/intel/spi: Move BIOS flash SPI controllers to fast SPI driver | Werner Zeh |
| 2022-09-22 | soc/mediatek/mt8188: Allow CPUfreq hardware to access MCUPM registers | Liju-Clr Chen |
| 2022-09-21 | soc/intel/meteorlake: Skip the TCSS D3 cold entry sequence | zhaojohn |
| 2022-09-20 | Revert "soc/intel/apollolake: Configure FSP UPDs to allow coreboot to lockdown" | Tim Wawrzynczak |
| 2022-09-20 | soc/intel/alderlake: Explicitly disable Energy Efficiency Turbo | Jeremy Compostella |
| 2022-09-20 | qualcomm/sc7280: initialize tu struct with zeros | Vinod Polimera |
| 2022-09-20 | soc/intel/alderlake: Add power state thresholds | Gaggery Tsai |
| 2022-09-19 | soc/intel/apollolake: LZ4 Compress FSP-M | Arthur Heymans |
| 2022-09-19 | soc/intel/apollolake: Add bits of GEN_PMCON2 register | Sean Rhodes |
| 2022-09-19 | soc/intel/apollolake: Configure FSP UPDs to allow coreboot to lockdown | Sean Rhodes |
| 2022-09-19 | amd/mendocino/root_complex: Throttle SOC during low/no battery | Tim Van Patten |
| 2022-09-19 | amd/mendocino/acpi/soc: Add DPTC Support | Tim Van Patten |
| 2022-09-19 | soc/amd/mendocino: Add low/no battery VRM limit registers | Tim Van Patten |
| 2022-09-19 | amd/mendocino/root_complex: Set DPTC VRM limit values | Tim Van Patten |
| 2022-09-19 | soc/amd/mendocino: Add VRM limit DPTC registers | Tim Van Patten |
| 2022-09-19 | soc/amd/acpi: Add low/no battery mode to DPTC | Tim Van Patten |
| 2022-09-19 | soc/amd/mendocino/acpi: Add support for shared TPM_I2C controller | Jan Dabros |
| 2022-09-16 | soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU ID | Jeremy Soller |
| 2022-09-16 | soc/intel/alderlake: Set FSP-S GnaEnable based on devicetree | Jeremy Soller |
| 2022-09-16 | soc/intel/common: Update comment on HFSTS1.spi_protection_mode | Sridhar Siricilla |
