coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-02-11	mainboards: Drop PWRS from GNVS	Kyösti Mälkki
2021-02-11	soc/amd/cezanne/smihandler: add basic SMI APMC and sleep handler	Felix Held
2021-02-11	soc/amd/cezanne: select soc-specific ACPI functionality	Felix Held
2021-02-11	soc/amd/*/smihandler: use size_t and unsigned int	Felix Held
2021-02-11	soc/amd/*/smihandler: remove replace southbridge references with fch	Felix Held
2021-02-11	soc/amd/cezanne/chip: set device operations for UART MMIO devices	Felix Held
2021-02-11	soc/amd/cezanne: add empty mp_init_cpus	Felix Held
2021-02-11	soc/amd/cezanne/cpu: add basic zen_2_3_init functionality	Felix Held
2021-02-11	src: Remove unused <arch/cpu.h>	Elyes HAOUAS
2021-02-11	soc/intel/broadwell: Remove _ADR from SerialIO ACPI devices	Angel Pons
2021-02-11	soc/intel/xeon_sp; Remove unneeded whitespace before tab	Elyes HAOUAS
2021-02-11	soc/amd: fully commonize clear_tvalid	Felix Held
2021-02-11	soc/amd/cezanne/smihandler: add missing southbridge_io_trap_handler	Felix Held
2021-02-11	soc/amd: include cpu/x86/smm directory in common SMM Makefile	Felix Held
2021-02-11	soc/amd: move southbridge_smi_handler to common code	Felix Held
2021-02-11	soc/amd: factor out common SMM relocation code	Felix Held
2021-02-11	soc/amd*/smihandler: factor out and rename clear_smi_sci_status	Felix Held
2021-02-11	soc/amd*/smihandler: factor out and rename clear_all_smi_status	Felix Held
2021-02-11	soc/amd/cezanne: add empty SMM-handler	Felix Held
2021-02-11	soc/amd/stoneyridge: drop empty sb_enable	Felix Held
2021-02-10	soc/amd/cezanne/fch: add HAVE_SMI_HANDLER case to fch_init_acpi_ports	Felix Held
2021-02-10	soc/amd/stoneyridge/chip: rewrite enable_dev as switch case statement	Felix Held
2021-02-10	soc/amd/cezanne: Add verstage support	Raul E Rangel
2021-02-10	soc/amd/common/psp_gen2: print error for uninitialized MSR_PSP_ADDR	Felix Held
2021-02-10	soc/amd/common/block/psp: factor out soc_get_psp_base_address	Felix Held
2021-02-10	soc/amd/cezanne: Enable SOC_AMD_COMMON_BLOCK_SPI	Raul E Rangel
2021-02-10	soc/amd/common/blocks/lpc: Remove common SPI registers	Raul E Rangel
2021-02-10	soc/amd/cezanne: Add SPI registers	Raul E Rangel
2021-02-10	soc/amd/picasso: Add SPI registers	Raul E Rangel
2021-02-10	soc/amd/stoneyridge: Add SPI registers	Raul E Rangel
2021-02-10	soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0	Elyes HAOUAS
2021-02-10	soc/intel/skylake: Convert to ASL 2.0 syntax	Elyes HAOUAS
2021-02-10	soc/intel/skylake/acpi: Add PEP table	Benjamin Doron
2021-02-10	soc/amd/common/block: Fix guards for PSP transfer buffer	Raul E Rangel
2021-02-10	soc/amd/common/block/cpu/noncar: Remove unneeded whitespace before tab	Elyes HAOUAS
2021-02-10	soc/amd/picasso/smihandler: replace southbridge.c in comment with fch.c	Felix Held
2021-02-10	soc/amd/cezanne/chip: add empty set_mmio_dev_ops	Felix Held
2021-02-10	soc/amd/cezanne/chip: add empty cpu_bus_ops	Felix Held
2021-02-10	soc/amd/block/psp/psp: raise log level of PSP failure messages	Felix Held
2021-02-10	soc/intel/broadwell/pch: Simplify PCI RMW operations	Angel Pons
2021-02-10	soc/intel/broadwell: Use common MADT code	Angel Pons
2021-02-10	soc/intel/broadwell/pch: Drop `acpi_sci_irq` function	Angel Pons
2021-02-10	soc/intel/{cnl,skl}: Add alignment check for TSEG base and size	Benjamin Doron
2021-02-10	soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard design	Shreesh Chhabbi
2021-02-10	src: Remove unused <boot_device.h>	Elyes HAOUAS
2021-02-10	soc/amd: Move southbridge_smi_set_eos to common/blocks/smi/smi_util	Felix Held
2021-02-10	soc/amd: Move global_smi_enable to common/blocks/smi/smi_util	Felix Held
2021-02-10	soc/amd: Move soc_route_sci to common/blocks/smi/smi_util	Felix Held
2021-02-10	soc/amd/picasso: Move APM_CNT_SMMINFO callsite	Kyösti Mälkki
2021-02-09	Revert "soc/amd/picasso: Change GPIO _HID to AMDI0030"	Martin Roth
2021-02-09	soc/amd/picasso/cpu: move set_cstate_io_addr to common code	Felix Held
2021-02-09	soc/amd/picasso/cpu: move get_cpu_count to common code	Felix Held
2021-02-09	soc/amd/cezanne: Add root_complex	Raul E Rangel
2021-02-09	soc/amd/stoneyridge/cpu: use MSR_PSP_ADDR define instead of hex number	Felix Held
2021-02-09	soc/amd/cezanne: add empty CPU driver	Felix Held
2021-02-09	soc/amd/cezanne: Enable early LPC support in bootblock stage	Zheng Bao
2021-02-09	soc/amd/picasso: move smm_region to soc/amd/common/block/cpu/noncar	Felix Held
2021-02-09	soc/amd/picasso/memmap: drop __SIMPLE_DEVICE__	Felix Held
2021-02-09	soc/amd/stoneyridge/memmap: drop __SIMPLE_DEVICE__	Felix Held
2021-02-09	src: Add missing <cbmem.h>	Elyes HAOUAS
2021-02-09	soc/amd,intel: Drop s3_resume parameter on FSP-S functions	Kyösti Mälkki
2021-02-09	drivers/intel/fsp1_1,fsp2_0: Refactor logo display	Kyösti Mälkki
2021-02-09	soc/amd/stoneyridge/acpi: Convert to ASL 2.0	Elyes HAOUAS
2021-02-08	soc/amd/common/memmap: add comment about types in memmap_early_dram	Felix Held
2021-02-08	soc/amd/picasso/iomap: change ACPI_CPU_CONTROL to match AGESA	Felix Held
2021-02-08	soc/intel/{baytrail,broadwell}: Add missing <cbmem.h>	Angel Pons
2021-02-08	soc/intel/braswell,skylake: Drop logo parameters from devicetree	Kyösti Mälkki
2021-02-08	soc/intel: Drop CID1 from GNVS	Kyösti Mälkki
2021-02-07	soc/intel/broadwell/include/soc/me.h: Clean includes	Elyes HAOUAS
2021-02-07	soc/intel/quark/storage_test.c: Remove redundant <commonlib/cbmem_id.h>	Elyes HAOUAS
2021-02-07	acpi: Fix BERT size_t printf format error	Benjamin Doron
2021-02-07	src: Remove redundant include <rules.h>	Elyes HAOUAS
2021-02-07	soc/intel/alderlake: Increase VBT size to 9 KiB	Maulik V Vaghela
2021-02-07	soc/amd/stoneyridge: remove STONEYRIDGE_ACPI_IO_BASE Kconfig option	Felix Held
2021-02-07	soc/amd/stoneyridge: remove STONEYRIDGE_ prefix of ACPI_IO_BASE define	Felix Held
2021-02-07	soc/intel/broadwell: Use common {DMI,EP,MCH}BAR accessors	Angel Pons
2021-02-07	soc/amd/cezanne/romstage: Store early dram region	Raul E Rangel
2021-02-07	soc/amd/picasso: Move memmap_early_dram to common blocks	Raul E Rangel
2021-02-07	soc/amd/cezanne/Makefile.inc: Fix indentation	Raul E Rangel
2021-02-07	soc/amd/cezanne/pcie_gpp: scan internal PCI buses	Felix Held
2021-02-07	soc/amd/cezanne/chip: add PCI bus scanning	Felix Held
2021-02-07	soc/intel/broadwell: Convert to ASL 2.0 syntax	Elyes HAOUAS
2021-02-06	drivers/intel/fsp2_0: Add support for MP services2 PPI	Aamir Bohra
2021-02-06	intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI	Furquan Shaikh
2021-02-06	intel: Drop FSP_PEIM_TO_PEIM_INTERFACE	Furquan Shaikh
2021-02-06	soc/intel/broadwell: Conditionally skip PRE_GRAPHICS_DELAY	Kyösti Mälkki
2021-02-06	soc/amd/stoneyridge: Create chipset_power_state in romstage	Kyösti Mälkki
2021-02-06	sb,soc/intel: Add wake source fields in GNVS	Kyösti Mälkki
2021-02-05	soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust	Chris Wang
2021-02-05	soc/amd/cezanne/iomap: move MMIO range comment above MMIO ranges	Felix Held
2021-02-05	soc/amd/cezanne/fch: add ACPI I/O port setup	Felix Held
2021-02-05	soc/amd/picasso: remove PICASSO_ACPI_IO_BASE Kconfig option	Felix Held
2021-02-05	soc/intel/broadwell: Convert some CONFIG(CHROMEOS) preprocessor	Kyösti Mälkki
2021-02-05	soc/amd/cezanne: populate some FSP-M UPDs	Felix Held
2021-02-05	soc/amd/common: Refactor single GPIO programming	Kyösti Mälkki
2021-02-05	soc/amd/common: Separate single GPIO programming	Kyösti Mälkki
2021-02-05	soc/mediatek/mt8192: Use LZ4 compression for MCUs	Yu-Ping Wu
2021-02-05	soc/intel/xeon_sp/cpx: Override SMBIOS type 4 max speed	Tim Chu
2021-02-05	soc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment	Elyes HAOUAS
2021-02-05	soc/intel/alderlake: Refactor PCIE port config	Eric Lai