coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-07-14	soc/amd: factor out check_mca to common code	Felix Held
2021-07-14	soc/amd/cezanne/mca: add empty mca_check_all_banks function	Felix Held
2021-07-14	soc/amd: move check_mca prototype to soc/amd/common/blocks/include	Felix Held
2021-07-14	soc/amd/stoneyridge: add and use mca_is_valid_bank & mca_get_bank_name	Felix Held
2021-07-14	soc/amd/picasso: implement and use mca_get_bank_name	Felix Held
2021-07-14	soc/amd/picasso: implement and use mca_is_valid_bank	Felix Held
2021-07-14	soc/amd/picasso: check length of mca_bank_name array	Felix Held
2021-07-14	soc/amd/picasso: add missing banks to mca_bank_name array	Felix Held
2021-07-14	soc/amd/stoneyridge: use index for mca_bank_name initialization	Felix Held
2021-07-14	soc/amd/stoneyridge/mca: add missing types.h include	Felix Held
2021-07-14	soc/amd/common/block/lpc: Don't disable the HOG bit	Raul E Rangel
2021-07-14	soc/amd/cezanne: Move APOB update into ramstage	Raul E Rangel
2021-07-14	soc/amd/common/block/apob: Fix incorrect printf format	Raul E Rangel
2021-07-14	soc/amd/cezanne: add basic MCA support	Felix Held
2021-07-14	include/cpu/amd/msr: add and use MC_CTL_MASK macro	Felix Held
2021-07-14	include/cpu/x86/msr: move MC0_CTL_MASK to include/cpu/amd/msr	Felix Held
2021-07-14	soc/amd/picasso/mca: use mca_clear_status()	Felix Held
2021-07-14	src: use mca_clear_status function instead of open coding	Felix Held
2021-07-14	soc/mediatek/mt8195: Get DRAM size from DRAM calibration result	Ryan Chuang
2021-07-14	soc/intel/alderlake: Add GFx Device ID 0x46a6	Maulik V Vaghela
2021-07-14	soc/intel/common: Use SPR for backing up data way and eviction mask	Subrata Banik
2021-07-14	soc/intel/skylake: Drop dead `ScanExtGfxForLegacyOpRom`	Angel Pons
2021-07-14	soc/intel/skylake: Rename `Rmt` devicetree setting	Angel Pons
2021-07-14	soc/intel/common/block/cpu/cpulib: use mca_get_bank_count()	Felix Held
2021-07-14	include/cpu/x86/msr: introduce IA32_MC_*(x) macros	Felix Held
2021-07-14	soc/amd/stoneyridge/mca: refactor warm boot check in mca_check_all_banks	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: factor out mca_check_all_banks	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: factor out mca_clear_errors	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: factor out mca_print_error()	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: use unsigned int for MCA bank number	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: clean up mca_bank struct	Felix Held
2021-07-14	soc/amd/picasso,stoneyridge/mca: mark num_banks as constant	Felix Held
2021-07-14	include/cpu/x86/msr: add IA32_ prefix to MC0_ADDR and MC0_MISC	Felix Held
2021-07-14	src: Use initial_lapicid() instead of open coding it	Arthur Heymans
2021-07-13	soc/intel/alderlake: Implement WA for DDR5 DIMM modules	Meera Ravindranath
2021-07-13	soc/intel/alderlake: Add (and fix) devices in IRQ table	Tim Wawrzynczak
2021-07-12	soc/amd/*/mca: use mca_get_bank_count()	Felix Held
2021-07-12	soc/amd/{cezanne,common}: Enable IOMMU PCIe Device	Raul E Rangel
2021-07-12	soc/intel/alderlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KB	Subrata Banik
2021-07-12	soc/amd/cezanne/acpi: Change GPIO controller interrupt to shared	Raul E Rangel
2021-07-12	soc/intel/common/irq: Program IRQ pin in irq_program_non_pch()	Tim Wawrzynczak
2021-07-12	soc/intel/alderlake: Add missing devices to pci_devs.h	Tim Wawrzynczak
2021-07-12	soc/amd/picasso,stoneyridge/mca: remove unneeded line break	Felix Held
2021-07-12	soc/intel/alderlake: Set max Pkg C-states to Auto	V Sowmya
2021-07-12	soc/mediatek/mt8195: fine tune pmif spi hardware settings for stability	James Lo
2021-07-08	soc/intel/alderlake: Avoid NULL pointer deference	John Zhao
2021-07-07	soc/mediatek/mt8195: Add dramc_param.h	Ryan Chuang
2021-07-07	soc/mediatek/mt8195: Enable DCM	Garmin Chang
2021-07-06	soc/amd/picasso: Allow end range entry for max device ID in IVRS	Aamir Bohra
2021-07-06	arch/x86: Use ENV_X86_64 instead of _x86_64_	Patrick Rudolph
2021-07-05	soc/intel/alderlake: Add support to update the FIVR configs	V Sowmya
2021-07-05	soc/intel/alderlake: Correct Bus and Device of Touch Host Controller	Varshit B Pandya
2021-07-02	soc/amd/common/espi: Fix debug message log level	Raul E Rangel
2021-07-02	soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads	Raul E Rangel
2021-07-02	soc/amd/cezanne: Enable SPI DMA support	Raul E Rangel
2021-07-02	soc/amd/common/block/lpc: Add custom SPI DMA boot device	Raul E Rangel
2021-07-02	arch/x86: Add X86_CUSTOM_BOOTMEDIA	Raul E Rangel
2021-07-02	src: Introduce `ARCH_ALL_STAGES_X86`	Angel Pons
2021-07-02	soc/intel/common/block/cse: Add ME EOP timestamps	Tim Wawrzynczak
2021-07-02	soc/intel/alderlake: Add USB TCSS enablement	Bernardo Perez Priego
2021-07-01	soc/intel/alderlake: Enable energy efficiency turbo mode	V Sowmya
2021-07-01	soc/intel: Refactor `xdci_can_enable()` function	Angel Pons
2021-07-01	soc/intel/alderlake: Select VBOOT_X86_SHA256_ACCELERATION config	Subrata Banik
2021-06-30	soc/intel/jasperlake: Send End-of-Post message to CSE	Tim Wawrzynczak
2021-06-30	soc/intel/tigerlake: Send End-of-Post message to CSE	Tim Wawrzynczak
2021-06-30	soc/intel/alderlake: Send End-of-Post message to CSE	Tim Wawrzynczak
2021-06-30	soc/intel/common/block/cse: Add BWG error recovery to EOP failure	Tim Wawrzynczak
2021-06-30	soc/intel/elkhartlake: Enable PCH GBE	Lean Sheng Tan
2021-06-30	soc/intel/common: Refine pmc_get_xtal_freq function	Lean Sheng Tan
2021-06-30	soc/intel/common: Move PMC EPOC related code to Intel common code	Lean Sheng Tan
2021-06-30	src: Move `select ARCH_X86` to platforms	Angel Pons
2021-06-30	soc/amd/common/fsp/dmi.c: Fix Type 17 DMI reporting	Nikolai Vyssotski
2021-06-29	soc/intel/tigerlake: Enable support for common IRQ block	Tim Wawrzynczak
2021-06-29	soc/intel/alderlake: Enable support for common IRQ block	Tim Wawrzynczak
2021-06-29	soc/intel/cannonlake: Use new IRQ module	Tim Wawrzynczak
2021-06-29	soc/intel/cannonlake: Add some missing DEVFN macros	Tim Wawrzynczak
2021-06-29	soc/intel/common/irq: Add function to return IRQ for PCI devfn	Tim Wawrzynczak
2021-06-29	soc/intel/common/irq: Internally cache PCI IRQ results	Tim Wawrzynczak
2021-06-29	soc/intel/common/irq: Add function to program north PCI IRQs	Tim Wawrzynczak
2021-06-29	soc/intel/common/block/irq: Add support for intel_write_pci0_PRT	Tim Wawrzynczak
2021-06-29	soc/intel/common: Add new IRQ module	Tim Wawrzynczak
2021-06-29	southbridge/intel/common: Move invalid PIRQ value to 0	Tim Wawrzynczak
2021-06-28	soc/amd/cezanne: Add call to mb to configure eSPI requirements	Martin Roth
2021-06-28	soc/intel: Drop casts around `soc_read_pmc_base()`	Angel Pons
2021-06-28	xeon_sp/{cpx,skx}: Add config IFD_CHIPSET 'lbg'	Johnny Lin
2021-06-26	soc/mediatek/mt8195: Utilize the retry macro	Yu-Ping Wu
2021-06-26	soc/intel/jasperlake: Select DISPLAY_FSP_VERSION_INFO_2	Ronak Kanabar
2021-06-26	soc/intel/cache_as_ram.S: Fix CAR issues with Bootguard	Arthur Heymans
2021-06-25	soc/intel/apollolake: Drop `xdci_can_enable()` call	Angel Pons
2021-06-25	soc/intel/alderlake: Fix the typo for FSP_S_CONFIG param	V Sowmya
2021-06-25	soc/intel/apollolake/xdci.c: Use `dev` parameter	Angel Pons
2021-06-25	soc/intel/skylake: Use `devfn_disable()` to handle XDCI	Angel Pons
2021-06-25	soc/intel/skylake: Use `is_devfn_enabled()`	Angel Pons
2021-06-25	soc/intel/common/cse: Add support for sending CSE End-of-Post message	Tim Wawrzynczak
2021-06-25	soc/intel/alderlake: Update s0ix cstate table	Bernardo Perez Priego
2021-06-24	soc/intel/cache_as_ram.S: Fix SOC_INTEL_APOLLOLAKE	Arthur Heymans
2021-06-24	soc/intel/cache_as_ram.S: Add macro to detect bootguard nem	Arthur Heymans
2021-06-24	soc/intel/alderlake: Update mainboard_memory_init_params() argument	Subrata Banik
2021-06-24	soc/intel/alderlake: Refactor soc_silicon_init_params function	Subrata Banik
2021-06-24	soc/intel/alderlake: Rename FSP_S_CONFIG variable from params to s_cfg	Subrata Banik