coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-11-10	amd/stoneyridge: Remove dead southbridge definitions	Marshall Dawson
2017-11-10	amd/stoneyridge: Add more ACPI register definitions	Marshall Dawson
2017-11-10	amd/stoneyridge: Use the new generic acpi_sleep_from_pm1	Marshall Dawson
2017-11-10	amd/stoneyridge: Select AMD common sleep states	Marshall Dawson
2017-11-10	soc/amd/stoneyridge: Use uint8_t as type for SPD address	Richard Spiegel
2017-11-10	soc/amd/stoneyridge: Simplify and fix SMBUS code	Richard Spiegel
2017-11-10	soc/amd/common: Add DRAM clear option to northbridge.c	Richard Spiegel
2017-11-10	soc/intel/cannonlake: Remove structure variable initialization with 0	Subrata Banik
2017-11-10	soc/intel/common: Fix CSE common code to accomodate Skylake/Kabylake	Subrata Banik
2017-11-10	soc/intel/apollolake: Include HECI BAR0 address inside iomap.h	Subrata Banik
2017-11-10	src/soc/amd/stoneyridge/southbridge.h: Fix prototypes	Richard Spiegel
2017-11-09	soc/amd/stoneyridge: Fix and clean lpc.c	Richard Spiegel
2017-11-09	src/soc/amd/stoneyridge/southbridge.h: Remove unused prototypes	Richard Spiegel
2017-11-08	amd/stoneyridge: Add PSP definitions southbridge and iomap	Marshall Dawson
2017-11-08	amd/stoneyridge: Add SMU firmware blobs to cbfs	Marshall Dawson
2017-11-08	soc/amd/common/psp: Add command to load fw blobs	Marshall Dawson
2017-11-08	amd/stoneyridge: Remove fixme.c	Marshall Dawson
2017-11-08	amd/stoneyridge: Remove amdlib functions from fixme.c	Marshall Dawson
2017-11-08	amd/stoneyridge: Add northbridge register macros	Marshall Dawson
2017-11-07	soc/intel/kabylake: Add Dialog da7219 NHLT blob support	Naveen Manohar
2017-11-07	src: Fix all Siemens copyrights	Mario Scheithauer
2017-11-07	soc/intel/denverton_ns: re-factor HSIO configuration	Julien Viard de Galbert
2017-11-07	RISC-V boards: Stop using the config string	Jonathan Neuschäfer
2017-11-06	soc/amd/common/psp: Require PSP PCI definition in SOC	Marshall Dawson
2017-11-06	soc/amd/stoneyridge: consolidate addresses in iomap.h	Aaron Durbin
2017-11-06	soc/amd/stoneyridge: start header file for iomap	Aaron Durbin
2017-11-04	soc/amd/stoneyridge: don't open code known literals	Aaron Durbin
2017-11-04	soc/amd/stoneyridge: fix incorrect constants in macros	Aaron Durbin
2017-11-04	soc/amd/stoneyridge: remove superfluous NULL field initialization	Aaron Durbin
2017-11-04	soc/amd/common: remove superfluous NULL initializers on globals	Aaron Durbin
2017-11-04	soc/amd/common: remove use of LibAmdMemFill()	Aaron Durbin
2017-11-04	soc/intel/cannonlake: Add DSP support	Lijian Zhao
2017-11-04	soc/intel/cannonlake: Install common i2c	Lijian Zhao
2017-11-04	soc/intel/apollolake: Fix nhlt blobs path for GLK	Hannah Williams
2017-11-04	sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t	Jonathan Neuschäfer
2017-11-04	soc/intel/skylake: Update coding style for i2c	Lijian Zhao
2017-11-04	soc/intel/apollolake: Move to common dsp driver	Lijian Zhao
2017-11-04	soc/intel/common: Add common dsp driver	Lijian Zhao
2017-11-03	amd/stoneyridge: Clarify SPD structure in chip.h	Marshall Dawson
2017-11-03	soc/mediatek/mt8173: Remove cast of `NULL` to `void `	Paul Menzel
2017-11-03	soc/intel/quark/spi: Correct conversion specifier	Paul Menzel
2017-11-03	soc/intel/common/block/lpc: Make integer literal unsigned long	Paul Menzel
2017-11-03	soc/intel/common/block: Make integer literal unsigned long	Paul Menzel
2017-11-03	soc/mediatek/mt8173/Kconfig: Use plural of message	Paul Menzel
2017-11-03	soc/mediatek/mt8173: Remove unneeded header inclusion	Paul Menzel
2017-11-03	soc/mediatek/mt8173: Fix typo in debug message	Paul Menzel
2017-11-03	soc/mediatek/mt8173: Correct multi-line comment format	Paul Menzel
2017-11-03	soc/intel/apollolake: Add APL CPU device ID	Mario Scheithauer
2017-11-03	soc/intel/apollolake: Set CPU to Max Non-Turbo Ratio	Mario Scheithauer
2017-11-01	amd/stoneyridge: Remove duplicate LPC decode setup	Marshall Dawson
2017-11-01	amd/stoneyridge: Add pci_dev macros	Marshall Dawson
2017-11-01	amd/stoneyridge: Add definitions for various NB registers	Marshall Dawson
2017-11-01	amd/stoneyridge: Consolidate duplicate comment	Marshall Dawson
2017-11-01	amd/stoneyridge: Add definition for HPET to southbridge	Marshall Dawson
2017-11-01	soc/intel/cannonlake: Use SCS common code	Bora Guvendik
2017-10-31	intel/common/smbus: increase spd read performance	Kane Chen
2017-10-31	soc/amd/common: Add weak call for platform PCIE slot reset	Marc Jones
2017-10-27	soc/intel/apollolake: Switch to common p2sb	Lijian Zhao
2017-10-27	soc/intel/cannonlake: Use common p2sb driver	Lijian Zhao
2017-10-27	intel/common/p2sb: Add common p2sb driver	Lijian Zhao
2017-10-27	soc/amd/common: Remove agesa_LateRunApTask() callback	Marc Jones
2017-10-26	soc/intel/cannonlake: Add support for C state and P state	Shaunak Saha
2017-10-26	soc/intel/cannonlake: remove duplicate power_state migration	Patrick Georgi
2017-10-26	soc/intel/apollolake: avoid double accounting for power state	Patrick Georgi
2017-10-25	soc/intel/apollolake: Fix broken GNVS offset for chromeos	Furquan Shaikh
2017-10-25	soc/intel/skylake: Fix broken GNVS offset for chromeos	Furquan Shaikh
2017-10-23	soc: Add Kconfig for each soc vendor	Chris Ching
2017-10-23	soc/intel/cannonlake: Increase stack size from 4KiB to 8KiB	John Zhao
2017-10-22	soc/intel/cannonlake: Change max root port to 16	Lijian Zhao
2017-10-22	security/vboot: Move vboot2 to security kconfig section	Philipp Deppenwiese
2017-10-22	soc/intel/skylake: pass SataSpeedLimit param to FSP2	Matt DeVillier
2017-10-22	skylake/me: Add debug output of HFST registers	Youness Alaoui
2017-10-22	soc/amd/common: Revert PI blob search hack	Marshall Dawson
2017-10-22	soc/amd/stoneyridge: Remove duplicate macros in pci_devs.h	Chris Ching
2017-10-20	stoneyridge: Add SCI/GPE configuration	Marc Jones
2017-10-20	soc/stoneyridge: Remove _PRW ASL	Marc Jones
2017-10-20	stoneyridge: Fix USB ASL	Marc Jones
2017-10-20	soc/intel/cannonlake: Add platform.asl	Lijian Zhao
2017-10-20	soc/intel/skylake: update GNVS with SGX data	Pratik Prajapati
2017-10-20	soc/intel/apollolake: update GNVS with SGX data	Pratik Prajapati
2017-10-20	intel/common/block/sgx: Add API to enumerate SGX resources and update GNVS	Pratik Prajapati
2017-10-20	soc/intel/skylake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-10-20	soc/intel/apollolake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-10-20	intel/common/acpi: Add common SGX ASL	Pratik Prajapati
2017-10-20	soc/amd/common: Set AltImageBasePtr to 0	Martin Roth
2017-10-20	Stoney Ridge Platforms: Make AGESA callout tables common	Martin Roth
2017-10-19	soc/amd/stoneyridge: Use macros for PCI_DEVFN calls	Chris Ching
2017-10-19	soc/amd/stoneyridge: Replace magic registers	Richard Spiegel
2017-10-19	soc/intel/cannonlake: Fix HECI error on reset	Lijian Zhao
2017-10-19	soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size	Subrata Banik
2017-10-19	soc/intel/skylake: Use EBDA structure to store soc reserve memory size	Subrata Banik
2017-10-19	soc/intel/cannonlake: Add IGD Support and pre-OS display code	Abhay Kumar
2017-10-19	soc/fsp_broadwell_de: Add support for GPIO handling	Werner Zeh
2017-10-19	soc/intel/skylake: Probe XHCI for wake source for Internal PME	Furquan Shaikh
2017-10-19	soc/intel/skylake: Prevent false logs in pch_xhci_port_wake_check	Furquan Shaikh
2017-10-19	soc/intel/skylake: Define mask for SMI handlers that can be run in SCI mode	Furquan Shaikh
2017-10-19	soc/intel/skylake: Support logging wake source in SMM	Furquan Shaikh
2017-10-19	soc/intel/skylake: Move power_state functions to pmutil.c	Furquan Shaikh
2017-10-19	soc/intel/skylake: Use PCH_DEV_* instead of PCH_DEVFN_*	Furquan Shaikh
2017-10-19	soc/intel/skylake: Use newly added pmc_read_pm1_control	Furquan Shaikh