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path: root/src/soc
AgeCommit message (Expand)Author
2015-11-20fsp1_0: Remove hardcoded microcode locationsMartin Roth
2015-11-18google/veyron*: Pulse the i2c clock once if sda was lowDouglas Anderson
2015-11-17arm64: tegra132: tegra210: Remove old arm64/stage_entry.SJulius Werner
2015-11-17fsp_baytrail: use external microcode .h filesMartin Roth
2015-11-16arm64: Implement generic stage transitions for non-Tegra SoCsJulius Werner
2015-11-16intel/fsp_baytrail: Load APs microcode in baytrail_init_cpusYork Yang
2015-11-16intel/fsp_baytrail: Load BSP microcode in bootblockYork Yang
2015-11-13intel/skylake: ensure the RTC time is setAaron Durbin
2015-11-11fsp_baytrail: Add macros for legacy GPIO output set upWerner Zeh
2015-11-11arm/arm64: Generalize bootblock C entry pointJulius Werner
2015-11-11arm64: mmu: Make page table manipulation work across stagesJulius Werner
2015-11-10rockchip/rk3288: hdmi: configure display output mode with EDID informationYakir Yang
2015-11-09fsp_baytrail: Add functions to set a GPIOWerner Zeh
2015-11-07arm64: Remove cpu intialization through device-treeFurquan Shaikh
2015-11-07arm64: Remove SMP supportFurquan Shaikh
2015-11-07arm64: remove spin table supportAaron Durbin
2015-11-07arm64: remove ARCH_ARM64_CORTEX_A57_POWER_DOWN_SUPPORTAaron Durbin
2015-11-07arm64: remove secmonAaron Durbin
2015-11-05Kconfig: Remove obsolete Kconfig symbols from google/intel boardsMartin Roth
2015-11-05intel/skylake: Add Fan control supportSumeet Pawnikar
2015-11-05nvidia/tegra210: lp0_resume: clear the MC_INTSTATUS if MC_INTMASK was 0Joseph Lo
2015-11-05skylake: Set Pkg Power clamping bit in Power Limit MSRRizwan Qureshi
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-29rockchip/rk3288: If we fail to read the EDID 5 times in a row, it's an errorDouglas Anderson
2015-10-28intel/skylake: Add USB2 port config for max settingsDuncan Laurie
2015-10-27intel/skylake: Clean up USB configuration in devicetreeDuncan Laurie
2015-10-27FSP1_1: Always use common codeLee Leahy
2015-10-27FSP 1.1: Replace soc_ prefix with fsp_Lee Leahy
2015-10-27FSP 1.1: Move common FSP codeLee Leahy
2015-10-27intel/kunimitsu FAB3: Configure LPC to Quiet Mode.pchandri
2015-10-27intel/skylake: IRQ programming through UPDSubrata Banik
2015-10-27intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params updateRizwan Qureshi
2015-10-27intel/kunimitsu Fab3: Strengthening Rcomp target CTRL valuepchandri
2015-10-27intel/skylake: Add support for Gfx PEIM (AKA GOP)robbie zhang
2015-10-27fsp/intel common: Add support for Gfx PEIM (AKA GOP)robbie zhang
2015-10-25rockchip/rk3288: Remove 1392MHz option for RK3288 APLLDavid Hendricks
2015-10-25rockchip/rk3288: Add 1416MHz as an option for RK3288 APLLDavid Hendricks
2015-10-25rockchip/rk3288: Add 600MHz as an option for RK3288 APLLDavid Hendricks
2015-10-23Intel: Move MCRS ResourceTemplate outside of _CRS methodMartin Roth
2015-10-23intel/fsp_baytrail: Fix logging of ISPEnable optionDavid Imhoff
2015-10-15soc/intel/broadwell: fix USBDEBUG copy-pastaGeorg Wicherski
2015-10-15nvidia/tegra210: Drop FSF addressPatrick Georgi
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-14skylake: ACPI: Fix compiler warnings with iasl-20150717Duncan Laurie
2015-10-13t132: Add TIMESTAMP region to memlayout.ldFurquan Shaikh
2015-10-11skylake: add support for verstageAaron Durbin
2015-10-11soc/intel/common: use prog_locate() for finding fsp.binAaron Durbin
2015-10-11skylake: Leave SPI controller enabledLee Leahy
2015-10-11skylake: SPI code cleanupLee Leahy
2015-10-11tegra132: increase romstage size for vbootAaron Durbin
2015-10-11vboot: remove remnants of VBOOT_STUBAaron Durbin
2015-10-11intel fsp1_1: prepare for romstage vboot verification splitAaron Durbin
2015-10-11soc/intel/common: remove chipset specific callsAaron Durbin
2015-10-11intel SOC common: Remove unused parametersLee Leahy
2015-10-11Braswell: Modify CB to accomodate new FSPv83Subrata Banik
2015-10-11Skylake: remove the out-dated VR config and un-needed 24mhz calibrationrobbie zhang
2015-10-11skylake: ajdust cache-as-ram region to 64KiBAaron Durbin
2015-10-11intel: update common and FSP cache-as-ram parametersAaron Durbin
2015-10-11Do not show HAVE_MTC on non-tegra210Vladimir Serbinenko
2015-10-07cbfs: add struct cbfsfAaron Durbin
2015-10-05Add EM100 'hyper term' spi console support in ramstage & smmMartin Roth
2015-10-04drivers/uart/Kconfig: Select 8250 mem when 8250 mem32 is enabledAlexandru Gagniuc
2015-10-02tegra124: use the common verstage flowAaron Durbin
2015-10-02broadcom/cygnus: remove verstage.cAaron Durbin
2015-10-01tegra132/tegra210: remove verstage.cAaron Durbin
2015-10-01intel/fsp_baytrail: Remove unused MICROCODE_INCLUDE_PATH from KconfigWerner Zeh
2015-09-30vboot: provide a unified flow for separate verstageAaron Durbin
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-09-29skylake: select HAVE_INTEL_FIRMWAREAaron Durbin
2015-09-29intel: auto include intel/common/firmwareAaron Durbin
2015-09-28skylake: Work around issue in ACPI interpreterDuncan Laurie
2015-09-28skylake: ACPI: Remove Configurable TDP support codeDuncan Laurie
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-23chromeos: vboot and chromeos dependency removal for sw write protect statePaul Kocialkowski
2015-09-22linking: link bootblock.elf with .data and .bss sections againAaron Durbin
2015-09-22coreboot: introduce commonlibAaron Durbin
2015-09-17broadwell: Switch to using common ACPI _SWS codeDuncan Laurie
2015-09-17braswell: Switch to using common ACPI _SWS codeDuncan Laurie
2015-09-17skylake: Use common ACPI _SWS codeDuncan Laurie
2015-09-17Skylake: update C state latency and power numbersrobbie zhang
2015-09-17t210: lp0_resume: Configure unused SDMMC1/3 pads for low power leakageYen Lin
2015-09-17intel/skylake: Create "RtcLock" Silicon UPD from corebootBarnali Sarkar
2015-09-17intel/common: Add common code for filling out ACPI _SWSDuncan Laurie
2015-09-16Move final Intel chipsets with ME to intel/common/firmwareMartin Roth
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
2015-09-10intel/skylake: HAVE_UART_MEMORY_MAPPED doesn't exist anymorePatrick Georgi
2015-09-10skylake: Move ACPI init to SOC instead of mainboardDuncan Laurie
2015-09-10intel/common: Print board ID if enabledDuncan Laurie
2015-09-10skylake: Enable DPTF based on devicetree settingDuncan Laurie
2015-09-10Skylake: Print GPIO MMIO base and pad config using gpio_debug tokenSubrata Banik
2015-09-09skylake: dptf: Add TSR3 thermal sensor and CPU code cleanupDuncan Laurie
2015-09-09braswell: acpi: Allow DPTF thresholds to be defined at board-levelShawn Nematbakhsh
2015-09-09intel/skylake: ACPI: Clean up formatting in and fix ASL codeDuncan Laurie
2015-09-09verstage: use common program.ld for linkingAaron Durbin
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-08rk3288: Allow board-specific APLL (CPU clock) settingsDavid Hendricks
2015-09-08skylake: igd: clean up igd.cDuncan Laurie
2015-09-08braswell: Tristate CFIO 139 and CFIO 140Ravi Sarawadi
2015-09-08Skylake:Set DISB inside romstage after mrc initDhaval Sharma
2015-09-08skylake: Clean up chip.hDuncan Laurie
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