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AgeCommit message (Expand)Author
2021-02-11soc/amd: fully commonize clear_tvalidFelix Held
2021-02-11soc/amd/cezanne/smihandler: add missing southbridge_io_trap_handlerFelix Held
2021-02-11soc/amd: include cpu/x86/smm directory in common SMM MakefileFelix Held
2021-02-11soc/amd: move southbridge_smi_handler to common codeFelix Held
2021-02-11soc/amd: factor out common SMM relocation codeFelix Held
2021-02-11soc/amd*/smihandler: factor out and rename clear_smi_sci_statusFelix Held
2021-02-11soc/amd*/smihandler: factor out and rename clear_all_smi_statusFelix Held
2021-02-11soc/amd/cezanne: add empty SMM-handlerFelix Held
2021-02-11soc/amd/stoneyridge: drop empty sb_enableFelix Held
2021-02-10soc/amd/cezanne/fch: add HAVE_SMI_HANDLER case to fch_init_acpi_portsFelix Held
2021-02-10soc/amd/stoneyridge/chip: rewrite enable_dev as switch case statementFelix Held
2021-02-10soc/amd/cezanne: Add verstage supportRaul E Rangel
2021-02-10soc/amd/common/psp_gen2: print error for uninitialized MSR_PSP_ADDRFelix Held
2021-02-10soc/amd/common/block/psp: factor out soc_get_psp_base_addressFelix Held
2021-02-10soc/amd/cezanne: Enable SOC_AMD_COMMON_BLOCK_SPIRaul E Rangel
2021-02-10soc/amd/common/blocks/lpc: Remove common SPI registersRaul E Rangel
2021-02-10soc/amd/cezanne: Add SPI registersRaul E Rangel
2021-02-10soc/amd/picasso: Add SPI registersRaul E Rangel
2021-02-10soc/amd/stoneyridge: Add SPI registersRaul E Rangel
2021-02-10soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0Elyes HAOUAS
2021-02-10soc/intel/skylake: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-02-10soc/intel/skylake/acpi: Add PEP tableBenjamin Doron
2021-02-10soc/amd/common/block: Fix guards for PSP transfer bufferRaul E Rangel
2021-02-10soc/amd/common/block/cpu/noncar: Remove unneeded whitespace before tabElyes HAOUAS
2021-02-10soc/amd/picasso/smihandler: replace southbridge.c in comment with fch.cFelix Held
2021-02-10soc/amd/cezanne/chip: add empty set_mmio_dev_opsFelix Held
2021-02-10soc/amd/cezanne/chip: add empty cpu_bus_opsFelix Held
2021-02-10soc/amd/block/psp/psp: raise log level of PSP failure messagesFelix Held
2021-02-10soc/intel/broadwell/pch: Simplify PCI RMW operationsAngel Pons
2021-02-10soc/intel/broadwell: Use common MADT codeAngel Pons
2021-02-10soc/intel/broadwell/pch: Drop `acpi_sci_irq` functionAngel Pons
2021-02-10soc/intel/{cnl,skl}: Add alignment check for TSEG base and sizeBenjamin Doron
2021-02-10soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard designShreesh Chhabbi
2021-02-10src: Remove unused <boot_device.h>Elyes HAOUAS
2021-02-10soc/amd: Move southbridge_smi_set_eos to common/blocks/smi/smi_utilFelix Held
2021-02-10soc/amd: Move global_smi_enable to common/blocks/smi/smi_utilFelix Held
2021-02-10soc/amd: Move soc_route_sci to common/blocks/smi/smi_utilFelix Held
2021-02-10soc/amd/picasso: Move APM_CNT_SMMINFO callsiteKyösti Mälkki
2021-02-09Revert "soc/amd/picasso: Change GPIO _HID to AMDI0030"Martin Roth
2021-02-09soc/amd/picasso/cpu: move set_cstate_io_addr to common codeFelix Held
2021-02-09soc/amd/picasso/cpu: move get_cpu_count to common codeFelix Held
2021-02-09soc/amd/cezanne: Add root_complexRaul E Rangel
2021-02-09soc/amd/stoneyridge/cpu: use MSR_PSP_ADDR define instead of hex numberFelix Held
2021-02-09soc/amd/cezanne: add empty CPU driverFelix Held
2021-02-09soc/amd/cezanne: Enable early LPC support in bootblock stageZheng Bao
2021-02-09soc/amd/picasso: move smm_region to soc/amd/common/block/cpu/noncarFelix Held
2021-02-09soc/amd/picasso/memmap: drop __SIMPLE_DEVICE__Felix Held
2021-02-09soc/amd/stoneyridge/memmap: drop __SIMPLE_DEVICE__Felix Held
2021-02-09src: Add missing <cbmem.h>Elyes HAOUAS
2021-02-09soc/amd,intel: Drop s3_resume parameter on FSP-S functionsKyösti Mälkki
2021-02-09drivers/intel/fsp1_1,fsp2_0: Refactor logo displayKyösti Mälkki
2021-02-09soc/amd/stoneyridge/acpi: Convert to ASL 2.0Elyes HAOUAS
2021-02-08soc/amd/common/memmap: add comment about types in memmap_early_dramFelix Held
2021-02-08soc/amd/picasso/iomap: change ACPI_CPU_CONTROL to match AGESAFelix Held
2021-02-08soc/intel/{baytrail,broadwell}: Add missing <cbmem.h>Angel Pons
2021-02-08soc/intel/braswell,skylake: Drop logo parameters from devicetreeKyösti Mälkki
2021-02-08soc/intel: Drop CID1 from GNVSKyösti Mälkki
2021-02-07soc/intel/broadwell/include/soc/me.h: Clean includesElyes HAOUAS
2021-02-07soc/intel/quark/storage_test.c: Remove redundant <commonlib/cbmem_id.h>Elyes HAOUAS
2021-02-07acpi: Fix BERT size_t printf format errorBenjamin Doron
2021-02-07src: Remove redundant include <rules.h>Elyes HAOUAS
2021-02-07soc/intel/alderlake: Increase VBT size to 9 KiBMaulik V Vaghela
2021-02-07soc/amd/stoneyridge: remove STONEYRIDGE_ACPI_IO_BASE Kconfig optionFelix Held
2021-02-07soc/amd/stoneyridge: remove STONEYRIDGE_ prefix of ACPI_IO_BASE defineFelix Held
2021-02-07soc/intel/broadwell: Use common {DMI,EP,MCH}BAR accessorsAngel Pons
2021-02-07soc/amd/cezanne/romstage: Store early dram regionRaul E Rangel
2021-02-07soc/amd/picasso: Move memmap_early_dram to common blocksRaul E Rangel
2021-02-07soc/amd/cezanne/Makefile.inc: Fix indentationRaul E Rangel
2021-02-07soc/amd/cezanne/pcie_gpp: scan internal PCI busesFelix Held
2021-02-07soc/amd/cezanne/chip: add PCI bus scanningFelix Held
2021-02-07soc/intel/broadwell: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-02-06drivers/intel/fsp2_0: Add support for MP services2 PPIAamir Bohra
2021-02-06intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPIFurquan Shaikh
2021-02-06intel: Drop FSP_PEIM_TO_PEIM_INTERFACEFurquan Shaikh
2021-02-06soc/intel/broadwell: Conditionally skip PRE_GRAPHICS_DELAYKyösti Mälkki
2021-02-06soc/amd/stoneyridge: Create chipset_power_state in romstageKyösti Mälkki
2021-02-06sb,soc/intel: Add wake source fields in GNVSKyösti Mälkki
2021-02-05soc/amd/picasso: add UPD for RV2 USB3 phy setting adjustChris Wang
2021-02-05soc/amd/cezanne/iomap: move MMIO range comment above MMIO rangesFelix Held
2021-02-05soc/amd/cezanne/fch: add ACPI I/O port setupFelix Held
2021-02-05soc/amd/picasso: remove PICASSO_ACPI_IO_BASE Kconfig optionFelix Held
2021-02-05soc/intel/broadwell: Convert some CONFIG(CHROMEOS) preprocessorKyösti Mälkki
2021-02-05soc/amd/cezanne: populate some FSP-M UPDsFelix Held
2021-02-05soc/amd/common: Refactor single GPIO programmingKyösti Mälkki
2021-02-05soc/amd/common: Separate single GPIO programmingKyösti Mälkki
2021-02-05soc/mediatek/mt8192: Use LZ4 compression for MCUsYu-Ping Wu
2021-02-05soc/intel/xeon_sp/cpx: Override SMBIOS type 4 max speedTim Chu
2021-02-05soc/intel/skylake/acpi/irqlinks.asl: Fix typo in commentElyes HAOUAS
2021-02-05soc/intel/alderlake: Refactor PCIE port configEric Lai
2021-02-05soc/intel/broadwell/pch/lpc.c: Program GEN_PMCON_3 in one writeAngel Pons
2021-02-04soc/amd/common/block/acpi/pm_state: add missing includeFelix Held
2021-02-04soc/amd/picasso/fch: add missing iomap.h includeFelix Held
2021-02-04drivers/intel/fsp2_0: Fix running on x86_64Patrick Rudolph
2021-02-04acpi: Add support for reporting CrashLog in BERT tableFrancois Toguo
2021-02-04src: Remove useless comments in "includes" linesElyes HAOUAS
2021-02-04soc/amd/picasso: Fix copy-paste error in macro definitionsAngel Pons
2021-02-04soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0John Zhao
2021-02-04src: Remove unused <bootstate.h>Elyes HAOUAS
2021-02-04src: Remove unused <cbfs.h>Elyes HAOUAS
2021-02-04soc/qualcomm/sc7180/aop_load_reset.c: Add missing <program_loading.h>Elyes HAOUAS