Age | Commit message (Expand) | Author |
2021-02-08 | soc/intel/braswell,skylake: Drop logo parameters from devicetree | Kyösti Mälkki |
2021-02-08 | soc/intel: Drop CID1 from GNVS | Kyösti Mälkki |
2021-02-07 | soc/intel/broadwell/include/soc/me.h: Clean includes | Elyes HAOUAS |
2021-02-07 | soc/intel/quark/storage_test.c: Remove redundant <commonlib/cbmem_id.h> | Elyes HAOUAS |
2021-02-07 | acpi: Fix BERT size_t printf format error | Benjamin Doron |
2021-02-07 | src: Remove redundant include <rules.h> | Elyes HAOUAS |
2021-02-07 | soc/intel/alderlake: Increase VBT size to 9 KiB | Maulik V Vaghela |
2021-02-07 | soc/amd/stoneyridge: remove STONEYRIDGE_ACPI_IO_BASE Kconfig option | Felix Held |
2021-02-07 | soc/amd/stoneyridge: remove STONEYRIDGE_ prefix of ACPI_IO_BASE define | Felix Held |
2021-02-07 | soc/intel/broadwell: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
2021-02-07 | soc/amd/cezanne/romstage: Store early dram region | Raul E Rangel |
2021-02-07 | soc/amd/picasso: Move memmap_early_dram to common blocks | Raul E Rangel |
2021-02-07 | soc/amd/cezanne/Makefile.inc: Fix indentation | Raul E Rangel |
2021-02-07 | soc/amd/cezanne/pcie_gpp: scan internal PCI buses | Felix Held |
2021-02-07 | soc/amd/cezanne/chip: add PCI bus scanning | Felix Held |
2021-02-07 | soc/intel/broadwell: Convert to ASL 2.0 syntax | Elyes HAOUAS |
2021-02-06 | drivers/intel/fsp2_0: Add support for MP services2 PPI | Aamir Bohra |
2021-02-06 | intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI | Furquan Shaikh |
2021-02-06 | intel: Drop FSP_PEIM_TO_PEIM_INTERFACE | Furquan Shaikh |
2021-02-06 | soc/intel/broadwell: Conditionally skip PRE_GRAPHICS_DELAY | Kyösti Mälkki |
2021-02-06 | soc/amd/stoneyridge: Create chipset_power_state in romstage | Kyösti Mälkki |
2021-02-06 | sb,soc/intel: Add wake source fields in GNVS | Kyösti Mälkki |
2021-02-05 | soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust | Chris Wang |
2021-02-05 | soc/amd/cezanne/iomap: move MMIO range comment above MMIO ranges | Felix Held |
2021-02-05 | soc/amd/cezanne/fch: add ACPI I/O port setup | Felix Held |
2021-02-05 | soc/amd/picasso: remove PICASSO_ACPI_IO_BASE Kconfig option | Felix Held |
2021-02-05 | soc/intel/broadwell: Convert some CONFIG(CHROMEOS) preprocessor | Kyösti Mälkki |
2021-02-05 | soc/amd/cezanne: populate some FSP-M UPDs | Felix Held |
2021-02-05 | soc/amd/common: Refactor single GPIO programming | Kyösti Mälkki |
2021-02-05 | soc/amd/common: Separate single GPIO programming | Kyösti Mälkki |
2021-02-05 | soc/mediatek/mt8192: Use LZ4 compression for MCUs | Yu-Ping Wu |
2021-02-05 | soc/intel/xeon_sp/cpx: Override SMBIOS type 4 max speed | Tim Chu |
2021-02-05 | soc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment | Elyes HAOUAS |
2021-02-05 | soc/intel/alderlake: Refactor PCIE port config | Eric Lai |
2021-02-05 | soc/intel/broadwell/pch/lpc.c: Program GEN_PMCON_3 in one write | Angel Pons |
2021-02-04 | soc/amd/common/block/acpi/pm_state: add missing include | Felix Held |
2021-02-04 | soc/amd/picasso/fch: add missing iomap.h include | Felix Held |
2021-02-04 | drivers/intel/fsp2_0: Fix running on x86_64 | Patrick Rudolph |
2021-02-04 | acpi: Add support for reporting CrashLog in BERT table | Francois Toguo |
2021-02-04 | src: Remove useless comments in "includes" lines | Elyes HAOUAS |
2021-02-04 | soc/amd/picasso: Fix copy-paste error in macro definitions | Angel Pons |
2021-02-04 | soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0 | John Zhao |
2021-02-04 | src: Remove unused <bootstate.h> | Elyes HAOUAS |
2021-02-04 | src: Remove unused <cbfs.h> | Elyes HAOUAS |
2021-02-04 | soc/qualcomm/sc7180/aop_load_reset.c: Add missing <program_loading.h> | Elyes HAOUAS |
2021-02-04 | soc/mediatek/mt8192/spm.c: Add missing <string.h> | Elyes HAOUAS |
2021-02-04 | soc/amd/picasso: set GPE0_LIMIT to 32 and move definitions to registers | Felix Held |
2021-02-04 | amd/common/block/acpi/pm_state: fix comparison in get_index_bit | Felix Held |
2021-02-03 | soc/intel/tgl: Add configurable value for ConfigTdpLevel | Derek Huang |
2021-02-03 | soc/amd: rename sb_init_acpi_ports to fch_init_acpi_ports | Felix Held |
2021-02-03 | soc/amd/cezanne: remove UART2/3 AOAC device offsets | Felix Held |
2021-02-03 | soc/amd/picasso: clean up and re-sort UPD table | Chris Wang |
2021-02-03 | amdfwtool:cezanne: Add entry of PSP_BOOTLOADER_AB (0x73) | Zheng Bao |
2021-02-03 | pci_ids/intel: Add missing CFL-S GT1 IGD IDs | Nico Huber |
2021-02-03 | pci_ids/intel: Correct 0x3e96, it's a CFL-S part | Nico Huber |
2021-02-03 | src: Remove unused <boardid.h> | Elyes HAOUAS |
2021-02-03 | src: Remove unused <cbmem.h> | Elyes HAOUAS |
2021-02-03 | soc/ti/am335x/header.c: Add missing include | Elyes HAOUAS |
2021-02-03 | intel/xeon_sp: Select TPM_STARTUP_IGNORE_POSTINIT if INTEL_TXT is selected | Johnny Lin |
2021-02-03 | soc/intel: Fix compilation on x86_64 | Patrick Rudolph |
2021-02-02 | soc/amd/picasso/pcie_gpe: use PICM instead of PMOD in APCI code | Felix Held |
2021-02-02 | soc/amd/picasso/include/soc/southbridge: remove PM_USB_ENABLE defines | Felix Held |
2021-02-02 | soc/intel/baytrail,braswell: Drop TOLM from GNVS | Kyösti Mälkki |
2021-02-02 | soc/intel/baytrail,braswell: Sync PCI memory region in ASL | Kyösti Mälkki |
2021-02-01 | soc/amd/common: Use only byte access for old GPIO | Kyösti Mälkki |
2021-02-01 | soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h> | Elyes HAOUAS |
2021-02-01 | soc/amd/common: Drop ACPIMMIO GPIO bank separation | Kyösti Mälkki |
2021-02-01 | soc/intel/broadwell/gma.c: Add missing `break` in switch | Angel Pons |
2021-02-01 | soc/mediatek/mt8192: Enlarge DRAM_INIT_CODE size | Yu-Ping Wu |
2021-02-01 | soc/intel/skylake/Kconfig: Remove duplicated INTEL_DESCRIPTOR_MODE_CAPABLE | Elyes HAOUAS |
2021-02-01 | src/soc/intel: Remove CPU_INTEL_COMMON_SMM selection | Elyes HAOUAS |
2021-02-01 | src: Remove unused <cpu/x86/smm.h> | Elyes HAOUAS |
2021-02-01 | soc/samsung/exynos{5250,5420}/include/soc/cpu.h: Add missing include | Elyes HAOUAS |
2021-02-01 | soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQ | Subrata Banik |
2021-02-01 | soc/amd: Drop PCNT from GNVS | Kyösti Mälkki |
2021-02-01 | soc/intel/elkhartlake: Config PlatformDebugConsent | Frans Hendriks |
2021-02-01 | soc/intel/common/sata: Add support for Cannon Lake SATA (HALO) | Erik van den Bogaert |
2021-02-01 | soc/amd/stoneyridge/acpi: Convert to ASL 2.0 syntax | Elyes HAOUAS |
2021-02-01 | soc/intel/broadwell/pch/sata.c: Don't enable Bus Master | Angel Pons |
2021-02-01 | soc/intel/*: Get rid of custom microcode caching | Patrick Rudolph |
2021-02-01 | soc/intel/xeon_sp: Use native CAR teardown | Arthur Heymans |
2021-02-01 | drivers/intel/fsp2_0: Use coreboot postcar with FSP-T | Arthur Heymans |
2021-01-31 | soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK | Michael Niewöhner |
2021-01-31 | soc/amd/common/block/aoac: expand acronym in Kconfig help text | Felix Held |
2021-01-31 | soc/amd/cezanne/Kconfig: select common PSP gen2 support | Felix Held |
2021-01-31 | soc/amd/picasso/psp: move soc_get_mbox_address to common PSP gen2 code | Felix Held |
2021-01-31 | soc/amd/stoneyridge/psp: fix check of MSR_PSP_ADDR contents | Felix Held |
2021-01-31 | soc/amd/picasso/psp: fix check of MSR_PSP_ADDR contents | Felix Held |
2021-01-31 | soc/amd/*/psp: move MSR_CU_CBBCFG to common and rename to MSR_PSP_ADDR | Felix Held |
2021-01-31 | soc/amd/stoneyridge/southbridge: move PSP BAR hide bit to its register | Felix Held |
2021-01-31 | soc/amd/cezanne: add soc/cpu.h with CPUID define for Cezanne A0 stepping | Felix Held |
2021-01-30 | soc/intel/broadwell/pch: Drop some `config_of` uses | Angel Pons |
2021-01-30 | soc/intel/broadwell: Move `ramstage.c` to PCH scope | Angel Pons |
2021-01-30 | soc/intel/broadwell: Make `broadwell_init_pre_device` static | Angel Pons |
2021-01-30 | soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options | Angel Pons |
2021-01-30 | soc/intel/broadwell: Define and use MMCONF_BUS_NUMBER | Angel Pons |
2021-01-30 | soc/intel/broadwell: Use common SMBus code | Angel Pons |
2021-01-30 | soc/intel/{baytrail,broadwell} Fix building with refcode blobs | Angel Pons |
2021-01-30 | soc/amd,intel: Drop leftover GNVS includes | Kyösti Mälkki |
2021-01-30 | soc/amd/stoneyridge/southbridge: replace southbridge prefix with fch | Felix Held |