coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-02-01	soc/amd/common: Use only byte access for old GPIO	Kyösti Mälkki
2021-02-01	soc/amd/picasso/fch.c: Remove unused <acpi/acpi_pm.h>	Elyes HAOUAS
2021-02-01	soc/amd/common: Drop ACPIMMIO GPIO bank separation	Kyösti Mälkki
2021-02-01	soc/intel/broadwell/gma.c: Add missing `break` in switch	Angel Pons
2021-02-01	soc/mediatek/mt8192: Enlarge DRAM_INIT_CODE size	Yu-Ping Wu
2021-02-01	soc/intel/skylake/Kconfig: Remove duplicated INTEL_DESCRIPTOR_MODE_CAPABLE	Elyes HAOUAS
2021-02-01	src/soc/intel: Remove CPU_INTEL_COMMON_SMM selection	Elyes HAOUAS
2021-02-01	src: Remove unused <cpu/x86/smm.h>	Elyes HAOUAS
2021-02-01	soc/samsung/exynos{5250,5420}/include/soc/cpu.h: Add missing include	Elyes HAOUAS
2021-02-01	soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQ	Subrata Banik
2021-02-01	soc/amd: Drop PCNT from GNVS	Kyösti Mälkki
2021-02-01	soc/intel/elkhartlake: Config PlatformDebugConsent	Frans Hendriks
2021-02-01	soc/intel/common/sata: Add support for Cannon Lake SATA (HALO)	Erik van den Bogaert
2021-02-01	soc/amd/stoneyridge/acpi: Convert to ASL 2.0 syntax	Elyes HAOUAS
2021-02-01	soc/intel/broadwell/pch/sata.c: Don't enable Bus Master	Angel Pons
2021-02-01	soc/intel/*: Get rid of custom microcode caching	Patrick Rudolph
2021-02-01	soc/intel/xeon_sp: Use native CAR teardown	Arthur Heymans
2021-02-01	drivers/intel/fsp2_0: Use coreboot postcar with FSP-T	Arthur Heymans
2021-01-31	soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK	Michael Niewöhner
2021-01-31	soc/amd/common/block/aoac: expand acronym in Kconfig help text	Felix Held
2021-01-31	soc/amd/cezanne/Kconfig: select common PSP gen2 support	Felix Held
2021-01-31	soc/amd/picasso/psp: move soc_get_mbox_address to common PSP gen2 code	Felix Held
2021-01-31	soc/amd/stoneyridge/psp: fix check of MSR_PSP_ADDR contents	Felix Held
2021-01-31	soc/amd/picasso/psp: fix check of MSR_PSP_ADDR contents	Felix Held
2021-01-31	soc/amd/*/psp: move MSR_CU_CBBCFG to common and rename to MSR_PSP_ADDR	Felix Held
2021-01-31	soc/amd/stoneyridge/southbridge: move PSP BAR hide bit to its register	Felix Held
2021-01-31	soc/amd/cezanne: add soc/cpu.h with CPUID define for Cezanne A0 stepping	Felix Held
2021-01-30	soc/intel/broadwell/pch: Drop some `config_of` uses	Angel Pons
2021-01-30	soc/intel/broadwell: Move `ramstage.c` to PCH scope	Angel Pons
2021-01-30	soc/intel/broadwell: Make `broadwell_init_pre_device` static	Angel Pons
2021-01-30	soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options	Angel Pons
2021-01-30	soc/intel/broadwell: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-30	soc/intel/broadwell: Use common SMBus code	Angel Pons
2021-01-30	soc/intel/{baytrail,broadwell} Fix building with refcode blobs	Angel Pons
2021-01-30	soc/amd,intel: Drop leftover GNVS includes	Kyösti Mälkki
2021-01-30	soc/amd/stoneyridge/southbridge: replace southbridge prefix with fch	Felix Held
2021-01-30	soc/amd/cezanne: add use result of acpi_is_wakeup_s3() in FSP calls	Felix Held
2021-01-30	soc/amd/picasso/chip: add missing acpi/acpi.h include	Felix Held
2021-01-30	soc/intel/common/block: Create PCIE related macros	Subrata Banik
2021-01-30	soc/intel/alderlake: Remove pch.h from SoC directory	Subrata Banik
2021-01-30	soc/amd/piasso/data_fabric: rename data_fabric_read_reg32	Felix Held
2021-01-30	soc/amd/picasso/data_fabric: factor out indirect address/index write	Felix Held
2021-01-29	soc/amd/cezanne: add empty ramstage FCH support	Felix Held
2021-01-29	soc/amd/picasso/fch: replace southbridge prefix with fch	Felix Held
2021-01-29	soc/amd/cezanne/chip: add FSP silicon init driver call	Felix Held
2021-01-29	soc/intel: Remove duplicate call to acpi_wake_source()	Kyösti Mälkki
2021-01-29	device/Kconfig: Declare MMCONF symbols' type once	Angel Pons
2021-01-29	soc/intel: Drop CMEM from GNVS	Kyösti Mälkki
2021-01-29	soc/intel/baytrail,broadwell: Use resume_from_stage_cache()	Kyösti Mälkki
2021-01-29	stage_cache: Add resume_from_stage_cache()	Kyösti Mälkki
2021-01-29	soc/amd/picasso/Kconfig: order SOC_AMD_COMMON* selections alphabetically	Felix Held
2021-01-28	soc/amd/cezanne/Kconfig: move selections in alphabetical order	Felix Held
2021-01-28	soc/amd/picasso: allow USB_PD port setting override	Chris Wang
2021-01-28	soc/intel: Remove selection of ME_REGION_ALLOW_CPU_READ_ACCESS	Sridhar Siricilla
2021-01-28	xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devices	Johnny Lin
2021-01-28	soc/amd/common: Handle I2C resource only if base address is defined	Zheng Bao
2021-01-28	mb/google/asurada: Improve boot time by raising little CPU frequency	Yidi Lin
2021-01-28	soc/mediatek/mt8192: Implement dram all channel calibration	Huayang Duan
2021-01-28	soc/mediatek/mt8192: Add mt6315_romstage_init	Yidi Lin
2021-01-28	soc/mediatek/mt8192: Add function to raise the CCI frequency	Weiyi Lu
2021-01-28	soc/intel/xeon_sp/skx: Add soc_acpi_name	Marc Jones
2021-01-28	ACPI: Separate ChromeOS NVS in ASL	Kyösti Mälkki
2021-01-28	ACPI: Declare GNVS variables globally	Kyösti Mälkki
2021-01-28	arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits	Kyösti Mälkki
2021-01-28	arch/x86: Top-align .init in bootblock	Kyösti Mälkki
2021-01-28	cpu/x86: Rename __protected_start symbol	Kyösti Mälkki
2021-01-28	soc/intel: Refactor acpi_wake_source()	Kyösti Mälkki
2021-01-28	soc/intel: Refactor fill_acpi_wake()	Kyösti Mälkki
2021-01-28	soc/amd/picasso/acpi: Fix PCI0 MMIO window	Raul E Rangel
2021-01-28	soc/amd/picasso: fix CBFS MCACHE on Zork	Kangheui Won
2021-01-28	soc/amd/picasso/acpi: Remove DMA addresses for UARTs	Raul E Rangel
2021-01-28	soc/amd/cezanne/chip: add empty SoC device operations	Felix Held
2021-01-28	soc/amd/cezanne: compress FSP binaries in CBFS	Felix Held
2021-01-27	soc/amd/picasso/chip: use switch/case statement in enable_dev()	Felix Held
2021-01-27	soc/amd/stoneyridge: Change set_sb_nvs_final()	Kyösti Mälkki
2021-01-27	soc/amd/cezanne: Add UCODE firmware to CBFS	Zheng Bao
2021-01-27	soc/amd/picasso: Remove the useless definition of UCODE_FILEs	Zheng Bao
2021-01-27	soc/amd: Throw an error if FWM_POSITION_INDEX is empty	Zheng Bao
2021-01-27	soc/intel/alderlake: Generate LP4x SPD files using gen_spd.go	Amanda Huang
2021-01-27	soc/amd/common: Only set write_acpi_tables if ACPI table is enabled	Zheng Bao
2021-01-27	sb,soc/amd: Rename PMOD to PICM in ASL	Kyösti Mälkki
2021-01-27	ACPI: Separate device_nvs_t	Kyösti Mälkki
2021-01-27	soc/amd/common: Notify SMU of AC/DC state upon resume	Marshall Dawson
2021-01-27	soc/amd/common/block/smbus: remove stale comment	Felix Held
2021-01-26	soc/intel/braswell/romstage/romstage.c: Use __func__	Elyes HAOUAS
2021-01-26	soc/amd: Add an option to select if SOC supports ESPI sub decode	Zheng Bao
2021-01-26	soc/intel/xeon_sp/acpi.c: Add ACPI C-State table	Marc Jones
2021-01-26	soc/intel: Move c-state resource define	Marc Jones
2021-01-26	sb,soc/intel: Refactor power_on_after_fail option	Kyösti Mälkki
2021-01-26	soc/amd: Refactor some ACPI S3 calls	Kyösti Mälkki
2021-01-25	soc/amd/picasso: Change GPIO _HID to AMDI0030	Raul E Rangel
2021-01-25	soc/amd/picasso/acpi: Change I2C _HID to AMDI0010	Raul E Rangel
2021-01-25	soc/amd/picasso/acpi: Change UART _HID to AMDI0020	Raul E Rangel
2021-01-25	soc/intel/denverton_ns: Drop unused `pattrs.h`	Angel Pons
2021-01-25	soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driver	Furquan Shaikh
2021-01-25	soc/amd/picasso: Use makefile variable to locate UCODE	Zheng Bao
2021-01-25	soc/amd/common: Refactor ACPI wake source	Kyösti Mälkki
2021-01-25	soc/amd: Refactor ACPI power state and ELOG	Kyösti Mälkki
2021-01-25	sb,soc/intel: Remove no-op APMC for C-state and P-state	Kyösti Mälkki
2021-01-25	cpu/x86/smm: Use common APMC logging	Kyösti Mälkki