coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-09-09	apollolake: Define MAX_CPUS at SoC scope	Angel Pons
2020-09-09	geminilake: Factor out MAX_CPUS value	Angel Pons
2020-09-09	soc/intel/apollolake: Rename `SOC_INTEL_GLK` symbol	Angel Pons
2020-09-09	vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332	Subrata Banik
2020-09-08	pci_ids: Add Alder Lake DTT PCI IDs	Subrata Banik
2020-09-08	pci_ids: Add Alder Lake IPU PCI IDs	Subrata Banik
2020-09-08	soc/mediatek/mt8192: Add SPI flash controller dual read function	CK Hu
2020-09-08	soc/intel/baytrail: Add missing GSM size definitions	Angel Pons
2020-09-08	soc/intel/denverton_ns/Kconfig: Drop unused 'IQAT_MEMORY_REGION_SIZE'	Elyes HAOUAS
2020-09-08	soc/intel/tigerlake: Skip GPIO configuration from FSP	Srinidhi N Kaushik
2020-09-08	soc/intel/elkhartlake: Update SA & PM related definitions	Tan, Lean Sheng
2020-09-08	soc/intel/elkhartlake: Update PMC related register definitions	Tan, Lean Sheng
2020-09-08	soc/intel/elkhartlake: Add CPU, SA, PCH & IGD DIDs Table	Tan, Lean Sheng
2020-09-08	soc/intel/elkhartlake/acpi: Copy acpi directory from jasperlake	Tan, Lean Sheng
2020-09-08	soc/intel/elkhartlake: Do initial SoC commit till ramstage	Tan, Lean Sheng
2020-09-08	soc/intel/apollolake: Hook up ENABLE_VMX	Angel Pons
2020-09-08	soc/intel/apollolake: Select CPU_INTEL_COMMON	Angel Pons
2020-09-08	soc/intel/broadwell: Drop `gpu_panel_port_select`	Angel Pons
2020-09-08	soc/intel/tigerlake: Add SMRR Locking support	Tim Wawrzynczak
2020-09-08	soc/intel/common: Add SMRR Lock Supported bit definition for MTRR_CAP	Tim Wawrzynczak
2020-09-08	soc/mediatek/mt8192: Add SPI flash controller DMA read function	CK Hu
2020-09-06	soc/intel/apl: Add panel power and backlight configuration	Nico Huber
2020-09-06	soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default	Michael Niewöhner
2020-09-05	soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock	Subrata Banik
2020-09-04	soc/intel/{jasperlake,tigerlake}/Kconfig: Drop redundant 'select CPU_INTEL_CO...	Elyes HAOUAS
2020-09-04	soc/intel/cnl: Enable HECI3 depending on devicetree	Felix Singer
2020-09-04	soc/intel/tigerlake: Remove unused PID_SDX macro	Subrata Banik
2020-09-03	soc/amd/picasso/acpi: Remove padding in IVRS table caused by realignment.	Jason Glenesk
2020-09-03	soc/amd/picasso: Set max_speed_mts and configured_speed_mts	Rob Barnes
2020-09-03	soc/intel/cnl: Allow using the remaining Comet Lake FSPs	Felix Singer
2020-09-03	3rdparty/fsp: Update submodule pointer to current master	Felix Singer
2020-09-03	soc/intel/cnl: Add new Kconfig option which matches its FSPs name	Felix Singer
2020-09-03	soc/amd/picasso: Only build PSP bootloader & verstage into RO	Martin Roth
2020-09-03	soc/amd/picasso: Add config for PSP verstage signing token	Martin Roth
2020-09-03	soc/amd/picasso: Allow use of pre-built PSP verstage	Martin Roth
2020-09-03	soc/amd/picasso: Move DRAM end to after transfer buffer	Josie Nordrum
2020-09-02	soc/intel/tigerlake: Add mainboard hook for overriding SoC config	Jes Klinke
2020-09-02	src: Drop redundant 'select BOOTBLOCK_CONSOLE'	Elyes HAOUAS
2020-09-02	soc/intel/xeon_sp/Kconfig: Drop redundant 'select POSTCAR_CONSOLE'	Elyes HAOUAS
2020-09-02	{nb,soc}/intel/{haswell,broadwell}/memmap.c: Use ALIGN_DOWN(x, a)	Elyes HAOUAS
2020-09-01	{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent	Subrata Banik
2020-08-31	soc/intel/elkhartlake/romstage: Do initial SoC commit till romstage	Tan, Lean Sheng
2020-08-31	soc/intel/elkhartlake/bootblock: Do initial SoC commit until bootblock	Tan, Lean Sheng
2020-08-31	soc/amd/picasso/southbridge: make GPP clock outputs configurable	Felix Held
2020-08-31	soc/amd/picasso/southbridge.h: rename GPP clock setting offsets	Felix Held
2020-08-31	soc/amd/picasso/southbridge.h: replace GPP_CLK_REQ_MAP_* with macros	Felix Held
2020-08-31	soc/amd/picasso/southbridge.h: remove OSCOUT*_CLK_OUTPUT_ENB definitions	Felix Held
2020-08-31	{intel/gma,include/device}: Delete unused 'drm_dp_helper.h' file	Elyes HAOUAS
2020-08-29	PCI IDs: Add PCI ID for CML DPTF/DTT PCI device	Edward O'Callaghan
2020-08-28	amd/picasso/psp_verstage: add vboot rsa function	Kangheui Won
2020-08-28	soc/amd/picasso/romstage: Set SATA enable UPD if controller is enabled	Matt Papageorge
2020-08-28	vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt soc	Jonathan Zhang
2020-08-28	soc/intel/tigerlake: add ddr4-spd-empty.hex	Aaron Durbin
2020-08-28	mb/google/zork: Switch zork to use spd_tools	Rob Barnes
2020-08-28	util: Add memory parts needed by zork boards	Rob Barnes
2020-08-28	util/gen_spd: translate DeviceBusWidth to die bus width	Nick Vaccaro
2020-08-28	soc/mediatek/mt8192: Use SPI-NOR as flash controller	CK Hu
2020-08-28	util: rename lp4x spds to include "lp4x-" in name	Nick Vaccaro
2020-08-28	util: volteer/dedede: move generic SPDs to common location	Nick Vaccaro
2020-08-27	symbols: Change implementation details of DECLARE_OPTIONAL_REGION()	Julius Werner
2020-08-27	soc/intel/common: Include Elkhart Lake SA IDs	Tan, Lean Sheng
2020-08-27	soc/intel/common: Add Elkhart Lake B0 CPU ID	Tan, Lean Sheng
2020-08-26	soc/mediatek: Include addressmap.h in gpio_common.h	CK Hu
2020-08-26	soc/intel/tigerlake: Rename pch_init() code	Alexey Buyanov
2020-08-25	util: Add spd_tools to generate DDR4 SPDs for TGL boards	Nick Vaccaro
2020-08-25	soc/amd/picasso: If psp_verstage is in RO, don't reset on error	Martin Roth
2020-08-25	soc/mediatek/mt8192: Add dramc param struct	Huayang Duan
2020-08-25	soc/intel/jasperlake: Disable multiphase SI init	Ronak Kanabar
2020-08-25	soc/intel/jasperlake: Select PLATFORM_USES_FSP2_2	Ronak Kanabar
2020-08-24	soc/amd/picasso: Reboot for recovery if no psp workbuf is found	Martin Roth
2020-08-24	mrc_cache: Add mrc_cache fetch functions to support non-x86 platforms	Shelley Chen
2020-08-24	soc/amd/common: Move interrupt and wake status clear	Josie Nordrum
2020-08-24	soc/intel/jasperlake: Run pmc_set_acpi_mode() during .init in pmc_ops	Kane Chen
2020-08-24	soc/amd/picasso: Add console & timestamp buffers to psp_verstage	Martin Roth
2020-08-24	soc/intel/tigerlake: Fix IPU and Vtd config	Ravi Sarawadi
2020-08-24	soc/intel/jasperlake: use UDK_202005_BINDING	Ronak Kanabar
2020-08-24	soc/sifive: Drop unneeded empty lines	Elyes HAOUAS
2020-08-24	soc/amd/picasso: Store ddr_frequency in MT/s	Rob Barnes
2020-08-24	soc/intel/common: Add downgrade support for CSE Firmware	Sridhar Siricilla
2020-08-23	soc/amd/picasso/romstage: Set HDA disable UPD if controller disabled	Felix Held
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-21	soc/amd/picasso: If using VBOOT, skip the APOB_NV region for RO	Martin Roth
2020-08-21	soc/amd/common: add rudimentary ATIF support	Aaron Durbin
2020-08-21	SMM: Validate more user-provided pointers	Patrick Rudolph
2020-08-21	soc/intel/tigerlake: Enable long cr50 ready pulses	Jes Klinke
2020-08-21	soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE	Harshit Sharma
2020-08-20	cse_lite: Move global reset after MRC writeback	Caveh Jalali
2020-08-20	soc/amd/acpi: Move ACPI IVRS generation to coreboot	Jason Glenesk
2020-08-20	soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS'	Elyes HAOUAS
2020-08-19	cpu/ti/am335x: Move from cpu to soc in tree	Sam Lewis
2020-08-19	soc/amd/picasso: log and print GPIO wake events	Aaron Durbin
2020-08-19	soc/amd/common: add gpio subsystem event reporting	Aaron Durbin
2020-08-19	soc/amd/picasso: Use cbfs to locate the AMD firmware	Martin Roth
2020-08-19	soc/amd/picasso: Remove now unused #define	Martin Roth
2020-08-18	soc/amd/picasso: fix GPE snapshot state	Aaron Durbin
2020-08-18	elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE	Aaron Durbin
2020-08-18	soc/intel/jasperlake: Fix PMC_GPE_DW mapping	Meera Ravindranath
2020-08-18	soc/intel/jasperlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 5KB	Meera Ravindranath
2020-08-18	src: Remove unused 'include <delay.h>'	Elyes HAOUAS
2020-08-18	src: Remove unused 'include <lib.h>'	Elyes HAOUAS