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path: root/src/soc
AgeCommit message (Expand)Author
2017-12-05soc/intel/skylake: Fix DSX_CFG macro name for AC_PRESENTFurquan Shaikh
2017-12-04amd/stoneyridge: Transfer functions from early_setup.c to southbridge.cRichard Spiegel
2017-12-02soc/intel/apollolake: Add PNP configDivya Chellap
2017-12-02riscv: Remove config string supportJonathan Neuschäfer
2017-12-02soc/intel/cannonlake: Initialize PMC controllerSubrata Banik
2017-12-02soc/intel/common/block: Add Intel common PMC controller support for KBL, APLSubrata Banik
2017-12-02soc/amd/stoneyridge: Add GPIO40 to GPIO listMartin Roth
2017-12-02soc/amd/stoneyridge: Add RunOnAP supportMarc Jones
2017-12-01amd/stoneyridge: Update def_callouts.c to reset using reset.cMartin Roth
2017-12-01soc/amd/stoney: clean up and update reset.cMartin Roth
2017-11-30acpi/tpm: remove non-existent IRQ for Infineon TPM chipMatt DeVillier
2017-11-30amd/{hudson,stoneyridge}: fix out of bounds readRichard Spiegel
2017-11-30acpi/tpm: update TPM preprocessor guardsMatt DeVillier
2017-11-30soc/intel/skylake: Set low maximum temperature threshold for Thermal DeviceSubrata Banik
2017-11-30soc/intel/{APL,GLK}: Use Intel SRAM common codeV Sowmya
2017-11-30soc/intel/common: Add Intel SRAM common code supportV Sowmya
2017-11-29soc/amd/stoneyridge: Add mainboard call for SPD valuesMarc Jones
2017-11-28soc/intel/skylake: Make use of Intel common DSP blockSubrata Banik
2017-11-28google/scarlet: support kd097d04 panelLin Huang
2017-11-28rockchip/rk3399: support dual mipi dsiLin Huang
2017-11-28rockchip/rk3399: mipi: properly configure PHY timingLin Huang
2017-11-28rockchip/rk3399: improve mipi transfer flowLin Huang
2017-11-28rockchip/rk3399: mipi: correct Feedback divider settingLin Huang
2017-11-28rockchip/rk3399: mipi: correct phy parameter settingLin Huang
2017-11-28rockchip/rk3399: mipi: Fix LOOP_DIV_HIGH_SEL to be 4 bits wideLin Huang
2017-11-28intel/common/block: Add SKL CSME device IDSubrata Banik
2017-11-28AMD platforms: Fix ASL comment that implies "\_SB" is southbridgeMartin Roth
2017-11-23soc/intel/cannonlake: Add PM methods to power gate SD card controllerVaibhav Shankar
2017-11-23soc/intel/cannonlake: Invoke pmc and hard reset only if CSE fails to resetJohn Zhao
2017-11-23Constify struct cpu_device_id instancesJonathan Neuschäfer
2017-11-23soc/amd/common: Include appropriate headers in dimm_spd.hMarc Jones
2017-11-23soc/amd/stoneyridge: Get entire DDR4 SPDMarc Jones
2017-11-22Create SOC description file soc.aslRichard Spiegel
2017-11-21src/soc/intel/apollolake: move TCO1 disable into bootblockVadim Bendebury
2017-11-21soc/amd/stoneyridge: Add ELOG to SMMJohn E. Kabat Jr
2017-11-21amd/stoneyridge/spi: Fix reads greater than 5 bytesMarshall Dawson
2017-11-21soc/amd/common: Remove duplicated #include amd_pci_int_defs.hRichard Spiegel
2017-11-20soc/intel/cannonlake: Add ACPI workaround for EMMCLijian Zhao
2017-11-20amd/stoneyridge: Fix SPD files and functions camel caseMarc Jones
2017-11-17Move amd/stoneyridge/include/amd_pci_int_defs.h to include/soc/Richard Spiegel
2017-11-17soc/intel/cannonlake: fix gpio pin numbersBora Guvendik
2017-11-17soc/intel/cannonlake: Add cpu.asl fileShaunak Saha
2017-11-17amd/stoneyridge: Enable SMI trap on SlpTypMarshall Dawson
2017-11-17amd/stoneyridge: Add SlpTyp SMI handlerMarshall Dawson
2017-11-17amd/stoneyridge: Add SPI controller driverMarshall Dawson
2017-11-16vendorcode/amd/pi/00670F00: Get rid of filecodes, replace filecode.hMartin Roth
2017-11-15mb/{amd/gardenia,google/kahlee}: move carrizo_fch.asl code to socRichard Spiegel
2017-11-15soc/intel/skylake: Make use of common CSE code for skylakeSubrata Banik
2017-11-15soc/intel/common: Use HOST_CSR to get circular Buffer DepthSubrata Banik
2017-11-15soc/intel/common: Add HECI message retry countSubrata Banik
2017-11-15soc/intel: Enable ACPI DBG2 table generationDuncan Laurie
2017-11-15soc/intel/cannonlake: Fix and clean up xhci ACPI codeVaibhav Shankar
2017-11-14soc/amd/stoneyridge: Remove direct AGESA header includesMartin Roth
2017-11-14soc/amd/common: Remove direct AGESA header includesMartin Roth
2017-11-14AMD Stoney Ridge: Add agesa_headers.hMartin Roth
2017-11-14amd/common/spi: Update flash driver usageMarshall Dawson
2017-11-14soc/amd/stoneyridge: Load SMU fimware using PSPMarshall Dawson
2017-11-14amd/stoneyridge: Add generic IMC sleep and wakeupMarshall Dawson
2017-11-14amd/stoneyridge: Replace BIT(n) in southbridgeMarshall Dawson
2017-11-14amd/stoneyridge: Define bits for AcpiConfigMarshall Dawson
2017-11-13soc/intel/common: Add error print in common i2cLijian Zhao
2017-11-13soc/intel/cannonlake: Define default LPSS clockLijian Zhao
2017-11-13soc/amd/stoneyridge: Add CPU PPKG ASLMarc Jones
2017-11-13soc/amd/stoneyridge: Add GNVS variables for thermal controlMarc Jones
2017-11-13soc/amd/stoneyridge: Fix DRAM clear checkMarshall Dawson
2017-11-11soc/intel/apollolake: Make use of Intel SPI common blockSubrata Banik
2017-11-11soc/intel/apollolake: Add support for SPI deviceSubrata Banik
2017-11-11soc/intel/cannonlake: Make use of Intel SPI common blockSubrata Banik
2017-11-11soc/intel/skylake: Make use of Intel SPI common blockSubrata Banik
2017-11-11soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routineSubrata Banik
2017-11-11soc/intel/common/block: Add Intel common SPI supportSubrata Banik
2017-11-10soc/amd/stoneyridge: Add UMA settings to devicetreeAaron Durbin
2017-11-10amd/stoneyridge: Implement vboot_platform_is_resumingMarshall Dawson
2017-11-10amd/stoneyridge: Add function to find Pm1EvtBlk baseMarshall Dawson
2017-11-10amd/stoneyridge: Remove dead southbridge definitionsMarshall Dawson
2017-11-10amd/stoneyridge: Add more ACPI register definitionsMarshall Dawson
2017-11-10amd/stoneyridge: Use the new generic acpi_sleep_from_pm1Marshall Dawson
2017-11-10amd/stoneyridge: Select AMD common sleep statesMarshall Dawson
2017-11-10soc/amd/stoneyridge: Use uint8_t as type for SPD addressRichard Spiegel
2017-11-10soc/amd/stoneyridge: Simplify and fix SMBUS codeRichard Spiegel
2017-11-10soc/amd/common: Add DRAM clear option to northbridge.cRichard Spiegel
2017-11-10soc/intel/cannonlake: Remove structure variable initialization with 0Subrata Banik
2017-11-10soc/intel/common: Fix CSE common code to accomodate Skylake/KabylakeSubrata Banik
2017-11-10soc/intel/apollolake: Include HECI BAR0 address inside iomap.hSubrata Banik
2017-11-10src/soc/amd/stoneyridge/southbridge.h: Fix prototypesRichard Spiegel
2017-11-09soc/amd/stoneyridge: Fix and clean lpc.cRichard Spiegel
2017-11-09src/soc/amd/stoneyridge/southbridge.h: Remove unused prototypesRichard Spiegel
2017-11-08amd/stoneyridge: Add PSP definitions southbridge and iomapMarshall Dawson
2017-11-08amd/stoneyridge: Add SMU firmware blobs to cbfsMarshall Dawson
2017-11-08soc/amd/common/psp: Add command to load fw blobsMarshall Dawson
2017-11-08amd/stoneyridge: Remove fixme.cMarshall Dawson
2017-11-08amd/stoneyridge: Remove amdlib functions from fixme.cMarshall Dawson
2017-11-08amd/stoneyridge: Add northbridge register macrosMarshall Dawson
2017-11-07soc/intel/kabylake: Add Dialog da7219 NHLT blob supportNaveen Manohar
2017-11-07src: Fix all Siemens copyrightsMario Scheithauer
2017-11-07soc/intel/denverton_ns: re-factor HSIO configurationJulien Viard de Galbert
2017-11-07RISC-V boards: Stop using the config stringJonathan Neuschäfer
2017-11-06soc/amd/common/psp: Require PSP PCI definition in SOCMarshall Dawson
2017-11-06soc/amd/stoneyridge: consolidate addresses in iomap.hAaron Durbin
2017-11-06soc/amd/stoneyridge: start header file for iomapAaron Durbin