coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-07-09	soc/intel/braswell: Drop some BIOS_SPEW printk's	Angel Pons
2020-07-09	soc/intel/braswell/lpss.c: Use 16-bit ops on PCI COMMAND	Angel Pons
2020-07-09	soc/amd/picasso: Remove I2C4	Edward Hill
2020-07-09	soc/amd/picasso: Add dummy spinlock for psp_verstage	Martin Roth
2020-07-08	soc/amd/picasso: Update APOB size & base generation	Martin Roth
2020-07-08	arch/x86: Add memmove.c to x86 bootblock	Martin Roth
2020-07-08	src/amd/common: Exclude biosram from psp_verstage	Martin Roth
2020-07-08	soc/amd/picasso: Halt if workbuf is absent after psp_verstage	Martin Roth
2020-07-08	soc/amd/common: Don't init SMIs or SCIs in psp_verstage	Martin Roth
2020-07-08	soc/amd/picasso: Update the AMD firmware in RW-A & RW-B regions	Martin Roth
2020-07-08	soc/amd/picasso:Add psp_verstage components to amdfw binary	Martin Roth
2020-07-08	soc/amd/picasso: add psp_verstage	Martin Roth
2020-07-08	soc/amd/picasso: Allow modification of i2c base addresses in PSP	Martin Roth
2020-07-07	soc/intel/common/block: Add new block DTT	Tim Wawrzynczak
2020-07-07	soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master	John Zhao
2020-07-07	soc/intel/{tiger,jasper}lake: Add IPU to soc_acpi_name	Tim Wawrzynczak
2020-07-07	soc/intel/common: Add a minimal PCI driver for IPU	Tim Wawrzynczak
2020-07-07	lp4x: Add new memory parts and generate SPDs	David Wu
2020-07-06	src/**/acpi/smbus.asl: Drop dead code	Angel Pons
2020-07-06	soc/intel: Drop unused `#include <reg_script.h>`	Angel Pons
2020-07-06	mb/google/zork: Add USB2 phy tuning parameter for SI tuning	Chris Wang
2020-07-06	soc/amd/common: Fix missing gpio_banks.h include	Kyösti Mälkki
2020-07-06	soc/amd/picasso/memlayout: Verify bootblock is 16-bit aligned	Raul E Rangel
2020-07-06	soc/intel/jasperlake: set SerialIoUartDebugMode to skip Uart Init	Maulik V Vaghela
2020-07-06	soc/amd/picasso: Use PSP Sx command only for S3	Marshall Dawson
2020-07-04	soc/intel/xeon_sp/cpx: update HOB display code	Jonathan Zhang
2020-07-04	soc/intel/xeon_sp: Add read CPU PPIN MSR function	Johnny Lin
2020-07-04	soc/intel/tigerlake: Remove unused EHL DID from TGL SoC	Subrata Banik
2020-07-03	soc/intel/tigerlake: Disable hybrid storage mode in CSE Lite RO boot	Jamie Ryu
2020-07-03	soc/amd/common: fix eSPI virtual wire polarity encoding	Aaron Durbin
2020-07-03	drivers/intel/pmx_mux: Remove redundant declaration	Kyösti Mälkki
2020-07-03	soc/intel/common: Only touch Time Window Tau bits in supported SoCs	Tim Wawrzynczak
2020-07-02	soc/amd/picasso: Add support for generating I2S machine device	Furquan Shaikh
2020-07-02	soc/amd/picasso: Add .acpi_name and .acpi_fill_ssdt_generator for ACP device	Furquan Shaikh
2020-07-02	soc/amd/common: fix SPI bar resource usage	Aaron Durbin
2020-07-01	soc/intel/tigerlake: Switch to CSE Lite RW at BS_DEV_INIT_CHIPS entry	Jamie Ryu
2020-07-01	soc/intel/cannonlake: make satahotplug user configurable via devicetree	Jonas Loeffelholz
2020-07-01	soc/intel/common/cpu: Don't set any TCC settings if offset is 0	Tim Wawrzynczak
2020-07-01	soc/intel/skylake: Update ASL syntax in xhci.asl	Edward O'Callaghan
2020-07-01	soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4	John Zhao
2020-07-01	ACPI GNVS: Replace uses of smm_get_gnvs()	Kyösti Mälkki
2020-06-30	soc/amd/common/gpio: Clear interrupt and wake status when configuring pads	Furquan Shaikh
2020-06-30	soc/amd/common/gpio: Add new helper macro PAD_CFG_STRUCT_FLAGS	Furquan Shaikh
2020-06-30	soc/amd/gpio, mb/{amd,google}: Configure pads using a single entry in GPIO co...	Furquan Shaikh
2020-06-30	soc/amd/common/gpio: Use gpio_setbits32()	Furquan Shaikh
2020-06-30	soc/amd/common/gpio: Add macros for setting fields of soc_amd_gpio	Furquan Shaikh
2020-06-30	soc/amd/common/lpc: Skip SERIRQ setup when using eSPI	Marshall Dawson
2020-06-30	soc/amd/common/gpio: Rename GPIO debounce macros	Furquan Shaikh
2020-06-30	soc/amd/common/gpio: Update the macros for interrupt and pad filtering	Furquan Shaikh
2020-06-30	soc/amd/common/gpio: Make macro names for GPIO flags consistent	Furquan Shaikh
2020-06-30	soc/intel/cannonlake: Add UWES ASL into xhci.asl	Edward O'Callaghan
2020-06-30	jasperlake: enable tcc_offset functionality	Sumeet R Pawnikar
2020-06-30	tigerlake: enable tcc_offset functionality	Sumeet R Pawnikar
2020-06-30	soc/amd/common/gpio: Drop unused macro GPIO_TRIGGER_INVALID	Furquan Shaikh
2020-06-30	ACPI: Drop typedef global_nvs_t	Kyösti Mälkki
2020-06-30	soc/intel/tigerlake: Add CpuReplacementCheck to chip options	Jamie Ryu
2020-06-30	soc/intel/tigerlake: Avoid NULL pointer dereference	John Zhao
2020-06-30	src: Remove whitespaces before tabs	Elyes HAOUAS
2020-06-29	soc/amd/picasso: add NULL-pointer check to root_complex_fill_ssdt	Felix Held
2020-06-29	soc/amd/picasso/soc_util: add comment on the silicon and soc types	Felix Held
2020-06-29	soc/amd/common: Refactor GPIO SCI/SMI interrupts	Kyösti Mälkki
2020-06-29	soc/amd/common: Refactor GPIO_MASTER_SWITCH interrupt enable	Kyösti Mälkki
2020-06-29	soc/amd/common: Drop ACPIMMIO GPIO bank separation	Kyösti Mälkki
2020-06-29	soc/intel/tigerlake: Run pmc_set_acpi_mode() during .init in pmc_ops	William Wei
2020-06-28	vendorcode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww24 release and adapt soc	Jonathan Zhang
2020-06-28	soc/amd/common: Allow runtime mapping of ACPIMMIO banks	Kyösti Mälkki
2020-06-28	soc/amd/common: Access ACPIMMIO via proper symbols	Kyösti Mälkki
2020-06-28	soc/intel/common: add TCC activation functionality	Sumeet R Pawnikar
2020-06-28	soc/xeon_sp/cpx: Define MSR PPIN related registers	Johnny Lin
2020-06-28	soc/amd/picasso/soc_util: rework reduced I/O chip detection	Felix Held
2020-06-27	soc/intel/broadwell: Use common early SPI code	Angel Pons
2020-06-26	soc/rockchip: Use (Q) instead of @	Stefan Reinauer
2020-06-25	Revert "soc/amd/common/block/acpimmio: Update acpimmio for psp_verstage"	Kyösti Mälkki
2020-06-25	soc/intel/cannonlake: Add PchPmPwrCycDur to chip options	Sridhar Siricilla
2020-06-25	drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1	Jonathan Zhang
2020-06-25	soc/intel/xeon_sp: use edk2-stable202005 headers	Jonathan Zhang
2020-06-25	soc/intel/xeon_sp/cpx: display UPDs and CPX-SP specific HOBs	Jonathan Zhang
2020-06-25	soc/intel/cannonlake: Add missing USB_PORT_WAKE_ENABLE define	Edward O'Callaghan
2020-06-24	soc/amd/picasso: fix host bridge bus numbers	Aaron Durbin
2020-06-24	soc/amd/picasso: Add UPD xhci0_force_gen1	Chris Wang
2020-06-24	soc/intel/tigerlake: Fix unresolved symbol CDW1 error	John Zhao
2020-06-24	soc/intel/broadwell/adsp: Fix 8-bit write on PCI_INTERRUPT_LINE register	Elyes HAOUAS
2020-06-24	src: Report byte-sized access for GPE0	Angel Pons
2020-06-24	soc/amd/stoneyridge: Correct ACPI CPU string prefix	Matt DeVillier
2020-06-24	ACPI: Replace smm_setup_structures()	Kyösti Mälkki
2020-06-24	ACPI: Replace uses of CBMEM_ID_ACPI_GNVS	Kyösti Mälkki
2020-06-23	src/*: Update makefiles to exclude x86 code from psp-verstage	Martin Roth
2020-06-22	soc/amd/picasso: Set BERT_SIZE to 0 when no table generated	Marshall Dawson
2020-06-22	soc/amd/picasso: Convert BERT reserved region from cbmem	Marshall Dawson
2020-06-22	soc/intel/tigerlake: Add CmdMirror option in chip.h	David Wu
2020-06-22	soc/intel/xeon_sp/cpx: rename xeon_sp_get_cpu_count()	Jonathan Zhang
2020-06-22	mb/google/volteer: Override power limits with SKU-specific limits	Tim Wawrzynczak
2020-06-22	amd/picasso/acpi: Add power resources for I2C and UART	Raul E Rangel
2020-06-22	soc/intel/xeon_sp/cpx: consider stack personality	Jonathan Zhang
2020-06-22	soc/intel/xeon_sp/cpx: update ACPI xSDT	Jonathan Zhang
2020-06-22	soc/intel/jasperlake: add processor power limits control support	Sumeet R Pawnikar
2020-06-22	soc/amd/picasso: don't increment boot count twice	Aaron Durbin
2020-06-22	soc/intel/xeon_sp/cpx: Finalize PCU configuration	Jonathan Zhang
2020-06-22	soc/intel/tigerlake: Update platform.asl to ASL2.0 syntax	V Sowmya
2020-06-22	soc/amd/picasso: Enable IDT in all stages	Furquan Shaikh