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AgeCommit message (Expand)Author
2018-11-07soc/intel/common: Include Icelake device IDsAamir Bohra
2018-11-07soc/amd/stoneyridge: Fix 81+ characters linesRichard Spiegel
2018-11-07soc/intel/skylake: Add FSP CAR support for kabylakePraveen hodagatta pranesh
2018-11-07mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener...Subrata Banik
2018-11-07soc/intel/apollolake: Provide interface to update TCC offsetJohn Su
2018-11-07timer: Add wait_us/wait_ms helper macros to wait for conditionsJulius Werner
2018-11-06soc/amd/common: Fix function formatingRichard Spiegel
2018-11-05soc/amd/stoneyridge: Get rid of void pointer mathRichard Spiegel
2018-11-05mediatek/mt8183: Add DDR driver of software impedance partHuayang Duan
2018-11-05src/soc/intel/braswell/romstage/romstage.c: Perform RTC init in romstageFrans Hendriks
2018-11-05soc/intel/cannonlake: Enable ISH from deviceLijian Zhao
2018-11-05soc/intel/cannonlake: Remove depreciated UPD selectionLijian Zhao
2018-11-05riscv: add support smp_pause / smp_resumeXiang Wang
2018-11-05src: Remove unneeded include <arch/ioapic.h>Elyes HAOUAS
2018-11-05soc/intel/icelake: Add PID based on Icelake EDSAamir Bohra
2018-11-02mediatek/mt8183: Add AUXADC driverPo Xu
2018-11-02soc/intel: Enable GPIO functions in verstageDuncan Laurie
2018-11-02soc/intel/icelake: Allow coreboot to reserve stack for fspAamir Bohra
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-31soc/amd/stoneyridge: Fix get_cpu_count()Martin Roth
2018-10-31soc/amd/stoneyridge: Get rid of domain_read_resourcesMartin Roth
2018-10-31soc/intel/apollolake: Revert the w/a nWR_24 settingJohn Zhao
2018-10-31soc/intel/icelake: Open ports 0x60,0x64 for keyboard controllerShelley Chen
2018-10-30src: Move shared amd64 and IA32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-30soc/amd/stoneyridge: Set IOMMU support to follow device settingMartin Roth
2018-10-30soc/amd/stoneyridge: Remove dev_find_slot where possibleRichard Spiegel
2018-10-30src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-30sifive/fu540: correct cbmem supportPhilipp Hug
2018-10-29tegra210_lp0: make sure to build with compiler.h includedNico Huber
2018-10-27soc/intel/*: Make FSP header path user configurablePatrick Georgi
2018-10-26soc/intel/icelake: Do initial SoC commitAamir Bohra
2018-10-26mediatek/mt8183: Correct MPU ctrl register addressHuayang Duan
2018-10-26soc/intel/cannonlake: Add back PM TIMER EMULATIONLijian Zhao
2018-10-25soc/amd/common/def_callouts.c: Prefer using '"%s...", __func__'Richard Spiegel
2018-10-25soc/amd/stoneyridge: Remove "else" after a returnRichard Spiegel
2018-10-25soc/intel: Consolidate FSP CAR setup and teardown codePraveen hodagatta pranesh
2018-10-25soc/intel/cannonlake: Enable S4 sleep state supportpraveen hodagatta pranesh
2018-10-25soc/amd/common/pi: Correct top of DRAM reporting by AGESAMarshall Dawson
2018-10-24mediatek/mt8183: Initialize DRAM with a sequence in constant arrayHuayang Duan
2018-10-24vboot: fix CONFIG_RESUME_PATH_SAME_AS_BOOT S3 resume logicJoel Kitching
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-23soc/amd/stoneyridge: Remove smbus.aslRichard Spiegel
2018-10-23soc/intel/common/block/gpio: Allow GPI to be dual-routedFurquan Shaikh
2018-10-23soc/intel/common/block/gpio: Configure Tx Disable in IO standby for GPIsFurquan Shaikh
2018-10-23soc/intel/apollolake: Add reset code to postcar stagePatrick Georgi
2018-10-22intel: Use CF9 reset (part 2)Patrick Rudolph
2018-10-22intel: Use CF9 reset (part 1)Patrick Rudolph
2018-10-22soc/amd: Implement common reset APINico Huber
2018-10-22soc/samsung/exynos5250: Convert to `board_reset()`Nico Huber
2018-10-22soc/mediatek: Convert to `board_reset()`Nico Huber
2018-10-22soc/imgtech/pistachio: Convert to `board_reset()`Nico Huber
2018-10-22soc/rockchip/rk3399: Convert to `board_reset()`Nico Huber
2018-10-22reset: Convert individual boards to `board_reset()`Nico Huber
2018-10-19soc/lowrisc: Remove the remains of a LowRISC socPeter Lemenkov
2018-10-19soc/intel/cannonlake: Enable HDA driver supportpraveen hodagatta pranesh
2018-10-18mediatek/mt8183: Add EMI init for DDR driver initHuayang Duan
2018-10-18mediatek/mt8183: Add register definitions of DRAM controllerTristan Shieh
2018-10-18cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-10-18soc/amd/stoneyridge: Replace double defined MISC MMIO reg. 0x40Richard Spiegel
2018-10-18soc/amd/stoneyridge: Remove double defined SPI100_SPEED_CONFIGRichard Spiegel
2018-10-18soc/amd/stoneyridge: Remove double definition for wideioRichard Spiegel
2018-10-18soc/amd/stoneyridge: Remove DEV_D18F4 definitionRichard Spiegel
2018-10-18soc/amd/stoneyridge: Remove double defined GPIO MMIO basesRichard Spiegel
2018-10-18amd/stoneyridge/include/soc: Re-arrange NB IOAPIC definitionsRichard Spiegel
2018-10-18soc/amd/stoneyridge/smi.c: Prefer using '"%s...", __func__'Richard Spiegel
2018-10-18soc/amd/stoneyridge/southbridge.c: Change comparison orderRichard Spiegel
2018-10-18soc/amd/stoneyridge: Remove "else" after a returnRichard Spiegel
2018-10-18intel/common/block: Fix issue found by klockworkJohn Zhao
2018-10-18soc/intel/skylake: Prevent disabling of TCONaresh G Solanki
2018-10-17soc/intel/cannonlake: Add CNP PCH-H gpio pin definitionspraveen hodagatta pranesh
2018-10-17soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh
2018-10-17mediatek/mt8183: Add USB supportJumin Li
2018-10-17mediatek: Refactor USB code among similar SoCsTristan Shieh
2018-10-17soc/cavium/cn81xx: Drop dead do_soft_reset() implementationNico Huber
2018-10-14soc/amd/stoneyridge: Define PM USB Enable registerMarshall Dawson
2018-10-14soc/amd/stoneyridge: Remove hudson EHCI debug controllersMarshall Dawson
2018-10-14soc/amd/stoneyridge: Remove errant parenthesis in southbridge.hMarshall Dawson
2018-10-14soc/amd/stoneyridge: Rearrange southbridge.h moreMarshall Dawson
2018-10-12drivers/intel/fsp2_0: Hook up IntelFSP repoPatrick Georgi
2018-10-12amd/stoneyridge: Fix PmControl register size in SMI handlerMarshall Dawson
2018-10-12amd/stoneyridge: Rename CGPLL_CONFIG definitionsMarshall Dawson
2018-10-12amd/stoneyridge: Rename GppClkCntrl fieldsMarshall Dawson
2018-10-12amd/stoneyridge: Rearrange southbridge.hMarshall Dawson
2018-10-12amd/stoneyridge: Remove dead GPIO definitionsMarshall Dawson
2018-10-12amd/stoneyridge: Clarify XHCI_PM register definitionsMarshall Dawson
2018-10-12amd/stoneyridge: Fix SPI_CMD_TRIGGER coding styleMarshall Dawson
2018-10-12amd/stoneyridge: Convert hex definitions to lower caseMarshall Dawson
2018-10-12amd/stoneyridge: Remove hudson register definitionsMarshall Dawson
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-11src: Replace MSR addresses with macrosElyes HAOUAS
2018-10-11amd/stoneyridge: Indicate STAPM units in their nameRichard Spiegel
2018-10-11selfboot: remove bounce buffersRonald G. Minnich
2018-10-11tegra124_lp0: make sure to build with compiler.h includedPatrick Georgi
2018-10-11soc/intel/common/block/gpio: check for NULL using if statementBora Guvendik
2018-10-10soc/intel/skylake: Set PCIEXPWAK_DIS if WAKE# pin is not enabledFurquan Shaikh
2018-10-10soc/cavium: dynamic UART initialization for cavium cn8100Jens Drenhaus
2018-10-10soc/amd/stoneyridge/gpio.c: Create I2C slave reset codeRichard Spiegel
2018-10-10mediatek/mt8183: Init PLLs for DRAMTristan Shieh
2018-10-09soc/intel/cannonlake: Add PCIE ASL entrySubrata Banik
2018-10-09soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devicesSubrata Banik