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path: root/src/soc
AgeCommit message (Expand)Author
2015-02-17T124: perform ram_repair when CPU rail is powered on in coldbootYen Lin
2015-02-17tegra124: Correct cpu power on sequence and CPUPWRGOOD_TIMEJimmy Zhang
2015-02-16acpi: Generate valid ACPI processor objectsTimothy Pearson
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2015-02-13tegra132: Fix build for verstageMarc Jones
2015-02-13fsp_baytrail: Add macros to define 20K pull-up and downWerner Zeh
2015-02-10Baytrail_fsp: Make ME path configurable in menuconfigWerner Zeh
2015-02-09fsp_baytrail: Get FSP reserved memory from the FSP HOB listMartin Roth
2015-02-09Intel FSP platforms: Fix timestampsKyösti Mälkki
2015-02-06include/types.h: Provide BIT() macroAlexandru Gagniuc
2015-02-06FSP & CBMEM: Fix broken cbmem CAR transition.Martin Roth
2015-01-27CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki
2015-01-27CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEMKyösti Mälkki
2015-01-27CBMEM: Move cbmemc_reinit()Kyösti Mälkki
2015-01-27vboot2: implement select_firmware for pre-romstage verificationDaisuke Nojiri
2015-01-27vboot2: add verstageStefan Reinauer
2015-01-26tegra132: Add support for tegra132 socFurquan Shaikh
2015-01-16baytrail: there is a chance that USBPHY_COMPBG is set to 0Kane Chen
2015-01-16baytrail: use the setting in devicetree.cb to config USBPHY_COMPBGKane Chen
2015-01-14baytrail broadwell: Use timestamps internal stashKyösti Mälkki
2015-01-14Revert "vboot2: add verstage"Paul Menzel
2015-01-13vboot2: add verstageDaisuke Nojiri
2015-01-13soc/intel/fsp_baytrail/gpio.c: Silence unused variable warningEdward O'Callaghan
2015-01-12soc/intel/broadwell/me.c: Prevent unused function warningEdward O'Callaghan
2015-01-12soc/intel/broadwell/spi_loading.c: Remove dead codeEdward O'Callaghan
2015-01-09nyan*: I2C: Fix bus clear BC_TERMINATE naming.Tom Warren
2015-01-09tegra124: fix and fine tune the warm boot codeJoseph Lo
2015-01-09tegra: i2c: re-init i2c controller after resetJimmy Zhang
2015-01-09storm: Reserve memory from 0x4000_0000-0x414f_ffffDavid Hendricks
2015-01-06broadwell: Use correct include file for console functionsStefan Reinauer
2015-01-06Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'"Kyösti Mälkki
2015-01-06doxygen fixes: change @var to @param varMartin Roth
2015-01-06doxygen fixes: fix parameter names to match the functionsMartin Roth
2015-01-06Re-factor 'to_flash_offset()' into 'spi_flash.h'Edward O'Callaghan
2015-01-05timestamps: Switch from tsc_t to uint64_tStefan Reinauer
2015-01-04ipq806x: Fix casting in cbmem_top() so >=2GB can be usedDavid Hendricks
2015-01-04ipq806x: move GPIO definitions to the proper include fileVadim Bendebury
2015-01-04ipq806x: move translation table out of the wayVadim Bendebury
2015-01-04ipq806x: Add USB supportJulius Werner
2015-01-04tegra124: configure DP with correct pixel clockVince Hsu
2015-01-03ipq806x: clean up UART driver tx_byte functionVadim Bendebury
2015-01-03storm: Put the page table at a correct addressVadim Bendebury
2015-01-03storm: modify memory layoutVadim Bendebury
2015-01-03soc/ipq806x : Add CONFIG_TTB_BUFFER for the soc.Deepa Dinamani
2015-01-03ipq8064: add SOC initialization skeletonVadim Bendebury
2015-01-03storm/ipq8064: add dynamic CBMEM supportVadim Bendebury
2015-01-03ipq8064: Configure storm bootblock to runVadim Bendebury
2015-01-03storm: ipq8064: enable CBFS SPI wrapperVadim Bendebury
2015-01-03ipq8084: provide monotonic us timerVadim Bendebury
2015-01-01soc/riscv: Fix typo in src/soc/ucb/Makefile.inc.Ronald G. Minnich
2014-12-31broadwell: Hook into the build systemDuncan Laurie
2014-12-31broadwell: Preparations for buildingMarc Jones
2014-12-31ipq8064: modify SPI controller driver to work in corebootVadim Bendebury
2014-12-31ipq8064/storm: UART enable and various fixesVadim Bendebury
2014-12-31baytrail: add more gpio init macrosKane Chen
2014-12-30ipq8064: copy u-boot spi driver as isVadim Bendebury
2014-12-30tegra: i2c: Add a timeout to I2C bit clear recovery mechanismJulius Werner
2014-12-30i2c: Add software_i2c driver for I2C debugging and emulationJulius Werner
2014-12-30tegra124: Active dc/sor register change immediatelyVince Hsu
2014-12-30tegra124: display clock should be initialized before any accessVince Hsu
2014-12-30ipq8064: prepare uart driver for use in corebootVadim Bendebury
2014-12-30ipq8064: prepare include files before adding UART driverVadim Bendebury
2014-12-30ipq8064: SOC UART driver belongs in the SOC directoryVadim Bendebury
2014-12-30ipq8064: make timer services availableMarc Jones
2014-12-30ipq/arm: Redesign hooks for bootblockVadim Bendebury
2014-12-30baytrail: Add defines and functions for GPNCOREKein Yuan
2014-12-28intel baytrail broadwell: Include microcode updatesKyösti Mälkki
2014-12-27samsung/exynos*/Makefile.inc: Simplify unnecessary ifeqEdward O'Callaghan
2014-12-26tegra124: Add a utility function to read the cause of the most recent reset.Gabe Black
2014-12-26nyan*: I2C: Implement bus clear when 'ARB_LOST' error occursTom Warren
2014-12-26soc/samsung/exynos5250/clk.h: Trivial, fix spelling in commentsEdward O'Callaghan
2014-12-26soc/samsung/exynos5250/clock.c: Trivial whitespace fixesEdward O'Callaghan
2014-12-26soc/samsung/exynos: Sync 'power.c' between chip variantsEdward O'Callaghan
2014-12-25soc/samsung/exynos: Make 'ps_hold_setup()' staticEdward O'Callaghan
2014-12-19nyan*: Add fast link training functionsJimmy Zhang
2014-12-19fsp_baytrail: Initialize LPC pads in bootblock for port 80Martin Roth
2014-12-19fsp_baytrail: Remove GPIO_NC1 #defineMartin Roth
2014-12-19baytrail SOCs: Add missing comma in gpio.hMartin Roth
2014-12-17baytrail: initialize backlight PWM frequencyAaron Durbin
2014-12-17x86: Initialize SPI controller explicitly during PCH initDavid Hendricks
2014-12-17tegra124: modify panel init sequenceKen Chang
2014-12-17nyan*: enable CLAMP_INPUTSKen Chang
2014-12-17fsp_baytrail: Add code to read GPIOs in romstageMartin Roth
2014-12-17ARM: Use LPAE for Virtual Address TranslationDaisuke Nojiri
2014-12-17tegra124: change PLLD VCO calculation algorithmKen Chang
2014-12-16tegra124: Allow "best" PLLD parameters for unmatched pixel clock.Hung-Te Lin
2014-12-16tegra124: Always enable DC when attaching SOR.Hung-Te Lin
2014-12-16nyan*: debug: Add sor registers dump functionJimmy Zhang
2014-12-16tegra124: clock: Enforce PLL constraints for VCO and CFJulius Werner
2014-12-16nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 registerJimmy Zhang
2014-12-16nyan*: merge a couple of sor setting difference from kernel driverJimmy Zhang
2014-12-16nyan*: Apply sor fix from kernel dc driverJimmy Zhang
2014-12-16tegra124: Initialize display panel by EDID.Hung-Te Lin
2014-12-16CBMEM console: Fix boards with BROKEN_CAR_MIGRATEKyösti Mälkki
2014-12-16Intel FSP: Move to DYNAMIC_CBMEMKyösti Mälkki
2014-12-16i2c: Replace the i2c API.Gabe Black
2014-12-15tegra124: set MOT bit for I2C-over-AUXKen Chang
2014-12-15tegra124: Setup clock PLLD by approximating display panel pixel clock.Hung-Te Lin
2014-12-15tegra124: Release DMA channel at end of transactionDavid Hendricks
2014-12-15tegra124: Use correct mask for APB bus widthDavid Hendricks
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