index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
Age
Commit message (
Expand
)
Author
2018-09-28
soc/intel/cannonlake: Move SkipMpInit config to FSPM
Lijian Zhao
2018-09-28
soc/amd/common/block/pi: Remove references to AmdLib
Richard Spiegel
2018-09-28
soc/intel/cannonlake: Add ACPI entry for LAN
Lijian Zhao
2018-09-28
soc/intel/cannonlake: Update UPD from device switch
Lijian Zhao
2018-09-28
src/*: normalize Google copyright headers
Patrick Georgi
2018-09-26
soc/sifive/fu540: Document #if ENV_ROMSTAGE line
Jonathan Neuschäfer
2018-09-26
soc/sifive/fu540: Remove PLL parameters from sdram.c
Jonathan Neuschäfer
2018-09-26
mb/lowrisc: Remove the Nexys4DDR port
Jonathan Neuschäfer
2018-09-26
soc/intel/common/block: Don't use device_t
Elyes HAOUAS
2018-09-24
amd/common/psp: Remove use of PspBaseLib
Charles Marslett
2018-09-24
soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific
Richard Spiegel
2018-09-22
skylake,kabylake: Add support to set eMMC tuning param from dev tree
Pratik Prajapati
2018-09-21
soc/intel/denverton_ns/csme_ie_kt.c: Don't use device_t
Elyes HAOUAS
2018-09-21
soc/intel/braswell/ramstage.c: Add SoC stepping D-1 support
Frans Hendriks
2018-09-21
soc/intel/quark/uart.c: Don't use device_t
Elyes HAOUAS
2018-09-21
soc/intel/skylake: Don't use device_t
Elyes HAOUAS
2018-09-21
soc/broadwell: Don't use device_t
Elyes HAOUAS
2018-09-21
soc/intel/skylake: Include some microcode blobs
Arthur Heymans
2018-09-21
soc/intel/cannonlake: Correct ITSS port id.
praveen hodagatta pranesh
2018-09-20
soc/intel/cannonlake: Remove const for spd_smbus_address
Lijian Zhao
2018-09-20
soc/amd/stoneyridge/romstage.c: Remove obsolete comment
Richard Spiegel
2018-09-20
soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources
Werner Zeh
2018-09-20
fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device
Werner Zeh
2018-09-19
amd/stoneyridge: Sync PSP base to MSR
Marshall Dawson
2018-09-18
soc/intel/common/block: Don't use device_t in ramstage
Elyes HAOUAS
2018-09-18
soc/cavium/cn81xx: Don't use device_t in ramstage
Elyes HAOUAS
2018-09-18
cpu/*/car: fix ancient URL explaining XIP range run-time calculation
Stefan Tauner
2018-09-17
mb/google/kahlee/variants/baseboard: Set STAPM percentage
Richard Spiegel
2018-09-17
soc/intel/broadwell: Add PCH_GPIO_PIRQ_INVERT definition
Matt DeVillier
2018-09-15
sifive/hifive-unleashed: enable CBMEM support
Philipp Hug
2018-09-15
soc/sifive: move ram_resource to mainboard
Philipp Hug
2018-09-14
soc/intel/denverton_ns: Enable common block PMC
Julien Viard de Galbert
2018-09-14
soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation
Philipp Hug
2018-09-14
soc/sifive/fu540: Initialize SDRAM
Philipp Hug
2018-09-14
soc/sifive/fu540: Switch clock to 1GHz in romstage
Philipp Hug
2018-09-14
soc/sifive/fu540: create ram_resource with actual memory size
Philipp Hug
2018-09-14
arch/riscv: provide a monotonic timer
Philipp Hug
2018-09-14
soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization
Philipp Hug
2018-09-14
complier.h: add __always_inline and use it in code base
Aaron Durbin
2018-09-13
soc/sifive/fu540: Get SDRAM controller out of reset
Philipp Hug
2018-09-13
soc/sifive/fu540: Update clock settings according SiFive bootloader
Philipp Hug
2018-09-13
uart/sifive: make divisor configurable
Philipp Hug
2018-09-13
src/*/intel/: clarify Kconfig options regarding IFD
Stefan Tauner
2018-09-12
soc/sifive/fu540: Initialize PLL and clock
Philipp Hug
2018-09-12
soc/amd/stoneyridge: Fix more GPIO functions
Jonathan Neuschäfer
2018-09-11
amd/stoneyridge: Enable BERT table generation
Marshall Dawson
2018-09-11
amd/stoneyridge: Set BERT region size when no TSEG used
Marshall Dawson
2018-09-11
soc/intel/baytrail: Remove trailing space in log message
Paul Menzel
2018-09-10
soc/sifive: fix compiler warning
Philipp Hug
2018-09-10
soc/sifive/fu540: Makefile: include mtime_init in ramstage
Philipp Hug
2018-09-10
soc/sifive/fu540: Add driver for OTP memory
Philipp Hug
2018-09-10
soc/intel/cannonlake: Correct number of root ports for CNL PCH H
Maulik V Vaghela
2018-09-10
soc/sifive/fu540: add CLINT support
Xiang Wang
2018-09-10
riscv: update mtime initialization
Xiang Wang
2018-09-10
complier.h: add __noreturn and use it in code base
Aaron Durbin
2018-09-10
soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetree
Shaunak Saha
2018-09-07
amd/stoneyridge: Construct ACPI BERT table
Marshall Dawson
2018-09-07
amd/stoneyridge: Construct BERT region from machine check
Marshall Dawson
2018-09-07
amd/stoneyridge: Create an MCA structure
Marshall Dawson
2018-09-07
amd/stoneyridge: Relocate MCA error identification
Marshall Dawson
2018-09-07
amd/stoneyridge: Adjust memory map for reserved
Marshall Dawson
2018-09-07
fsp_broadwell_de: enable spi console
Okash Khawaja
2018-09-06
soc/intel/cannonlake: Fix Coverity Scan report
Lijian Zhao
2018-09-06
mediatek: Refactor memory test code among similar SoCs
Tristan Shieh
2018-09-06
soc/intel/common: Add function to set BILD bit in RTC
Rizwan Qureshi
2018-09-06
chromeos/gnvs: remove function and naming cleanup
Joel Kitching
2018-09-02
riscv: separately define stack locations at different stages
Xiang Wang
2018-08-31
siemens/mc_apl1: Correct the Tx signal from SATA interface
Mario Scheithauer
2018-08-30
soc/intel/cannonlake: Fix comment errors for SMBUS
Lijian Zhao
2018-08-30
soc/amd/stoneyridge/enable_usbdebug.c: Update pci_ehci_dbg_set_port()
Richard Spiegel
2018-08-30
soc/intel/cannonlake: Update PMC base address for CNP H and LP
Maulik V Vaghela
2018-08-28
soc/intel/cannonlake: Change LPDDR4 to MEMCFG
Lijian Zhao
2018-08-28
siemens/mc_apl1: Extend circuit life by clock gating and power gating
Mario Scheithauer
2018-08-27
intel: Use common HPET table revision function
Marc Jones
2018-08-27
update all FADT version 3.0 to use the get tables function
Marc Jones
2018-08-24
soc/intel/apollolake: Make eMMC max speed configurable
Mario Scheithauer
2018-08-24
soc/cn81xx: Add vboot support
Philipp Deppenwiese
2018-08-24
soc/cavium/cn81xx: Don't directly manipulate devicetree data
Patrick Rudolph
2018-08-24
device_tree/fit: Constify data structures
Patrick Rudolph
2018-08-22
soc/intel/apollolake: Fix logical vs. bitwise operator
John Zhao
2018-08-22
soc/amd/stoneyridge/smihandler.c: Report pending wake event
Richard Spiegel
2018-08-22
cbtable: remove chromeos_acpi from cbtable
Joel Kitching
2018-08-22
acpi: remove CBMEM_ID_ACPI_GNVS_PTR entry
Joel Kitching
2018-08-21
soc/intel/skylake: Remove unsupported sleepstates in ACPI table
Lucas Chen
2018-08-20
soc/intel/skylake: Support PL1 override option
Wei Shun Chang
2018-08-20
soc/intel/skylake: add CPPC support
Matt Delco
2018-08-20
soc/intel/common/block: Move common uart function to block/uart
Subrata Banik
2018-08-20
soc/intel/common/block: Add WHL 2-core SKU
Krzysztof Sywula
2018-08-20
soc/intel/apollolake: Force USB-C into host mode
John Zhao
2018-08-20
intel/common/block: Fix issues found by klockwork
John Zhao
2018-08-17
arm64: Factor out common parts of romstage execution flow
Julius Werner
2018-08-17
soc/amd/common/block/pi/agesawarapper.c: Use find_image()
Richard Spiegel
2018-08-17
soc/amd/common/block: Port vendorcode's LibAmdLocateImage
Richard Spiegel
2018-08-17
Fix PCI ACPI _OSC methods
Marc Jones
2018-08-17
soc/intel/skylake: permit Kconfig to set subsystem ID
Matt Delco
2018-08-16
amd/stoneyridge: Add PMxC0 reset status to boot log
Edward Hill
2018-08-15
Stoneyridge: Remove VENDORCODE_FULL_SUPPORT
Richard Spiegel
2018-08-14
soc/amd/stoneyridge: Add bootblock_fch_init
Raul E Rangel
2018-08-13
soc/intel/broadwell/Kconfig: Clean up redefined config options
Arthur Heymans
2018-08-13
soc/intel/braswell/Kconfig: Clean up redefined config options
Arthur Heymans
[prev]
[next]