coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-10-12	amd/stoneyridge: Remove dead GPIO definitions	Marshall Dawson
2018-10-12	amd/stoneyridge: Clarify XHCI_PM register definitions	Marshall Dawson
2018-10-12	amd/stoneyridge: Fix SPI_CMD_TRIGGER coding style	Marshall Dawson
2018-10-12	amd/stoneyridge: Convert hex definitions to lower case	Marshall Dawson
2018-10-12	amd/stoneyridge: Remove hudson register definitions	Marshall Dawson
2018-10-11	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-11	src: Replace MSR addresses with macros	Elyes HAOUAS
2018-10-11	amd/stoneyridge: Indicate STAPM units in their name	Richard Spiegel
2018-10-11	selfboot: remove bounce buffers	Ronald G. Minnich
2018-10-11	tegra124_lp0: make sure to build with compiler.h included	Patrick Georgi
2018-10-11	soc/intel/common/block/gpio: check for NULL using if statement	Bora Guvendik
2018-10-10	soc/intel/skylake: Set PCIEXPWAK_DIS if WAKE# pin is not enabled	Furquan Shaikh
2018-10-10	soc/cavium: dynamic UART initialization for cavium cn8100	Jens Drenhaus
2018-10-10	soc/amd/stoneyridge/gpio.c: Create I2C slave reset code	Richard Spiegel
2018-10-10	mediatek/mt8183: Init PLLs for DRAM	Tristan Shieh
2018-10-09	soc/intel/cannonlake: Add PCIE ASL entry	Subrata Banik
2018-10-09	soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices	Subrata Banik
2018-10-09	soc/intel/common/acpi: Fix ACPI Namespace lookup failure, AE_ALREADY_EXISTS i...	Subrata Banik
2018-10-09	soc/intel/common/block/pcr: Add NULL pointer check in pcr_execute_sideband_msg()	Subrata Banik
2018-10-09	soc/intel/cannonlake: Disable Legacy PME for Root ports	Subrata Banik
2018-10-09	soc/intel/cannonlake: Ensure FSP don't override ITSS IPCx registers	Subrata Banik
2018-10-09	soc/intel/skylake: Ensure FSP don't override ITSS IPCx registers	Subrata Banik
2018-10-09	soc/intel/common/pch: Select Kconfig for ITSS polarity configuration	Subrata Banik
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-10-08	soc/intel/skylake: Fix ‘dev’ pointer NULL before being dereferenced	Subrata Banik
2018-10-08	smmstore: Add a key/val store facility in flash, mediated through SMM	Patrick Georgi
2018-10-08	src: Use tabs for indentation	Elyes HAOUAS
2018-10-06	soc/intel/common, mb/google, mb/siemens: Use lower case x for RXD	Furquan Shaikh
2018-10-06	soc/intel/common/block/hda: Enable static scanning of devices under HDA	Furquan Shaikh
2018-10-06	soc/intel/.../hda: Add and use config for initialization of HDA codecs	Furquan Shaikh
2018-10-05	soc/intel/skylake: check for NULL with if condition	Pratik Prajapati
2018-10-05	src: Fix MSR_PKG_CST_CONFIG_CONTROL register name	Elyes HAOUAS
2018-10-05	amd/stoneyridge: Comment PCI and AcpiMmio registers in ASL	Marshall Dawson
2018-10-05	amd/stoneyridge: Remove unused registers from ASL	Marshall Dawson
2018-10-05	amd/stoneyridge: Remove SATA D0 on suspend	Marshall Dawson
2018-10-04	soc/intel/cannonlake: Move the FSP related callbacks to separate files	Rizwan Qureshi
2018-10-04	soc/nvidia/tegra124: Increase bootblock size	Patrick Rudolph
2018-10-04	soc/intel/common: add acpi_get_sleep_type to pmclib	Bora Guvendik
2018-10-04	amd/stoneyridge: Use BIOS_DEBUG to log PM1 and PMxC0 status	Edward Hill
2018-10-04	amd/stoneyridge: Prepare for vboot rebooting system	Marshall Dawson
2018-10-04	src/soc/intel/cannonlake: Fix IA32_PLATFORM_DCA_CAP address	Elyes HAOUAS
2018-10-03	soc/amd/stoneyridge: Add IOMMU support	Marc Jones
2018-10-03	soc/intel/commom/block/i2c: Make I2C controller out of reset	Subrata Banik
2018-10-02	src/soc/intel/broadwell/me.c: Correct HMRFPO misspelling	Angel Pons
2018-10-02	soc/intel/skylake: Fix spelling mistake	Subrata Banik
2018-10-02	soc/intel/skylake: Replace white space with tab	Subrata Banik
2018-10-01	amd/stoneyridge: Add USB ASL for D0/D3cold	Marshall Dawson
2018-10-01	amd/stoneyridge: Add ASL helper for AOAC PwrGood Control	Marshall Dawson
2018-10-01	amd/stoneyridge: Add FCH WAK and PTS methods	Marshall Dawson
2018-10-01	amd/stoneyridge: Add ASL for D-states on AOAC devices	Marshall Dawson
2018-10-01	amd/stoneyridge: Add ACPI MMIO and PCI offsets to ASL	Marshall Dawson
2018-10-01	amd/stoneyridge: Load AOAC and USB gnvs values	Marshall Dawson
2018-10-01	amd/stoneyridge: Add USB settings to gnvs	Marshall Dawson
2018-10-01	amd/stoneyridge: Create gnvs entries for AOAC devices	Marshall Dawson
2018-10-01	soc/intel/fsp_broadwell_de: Fix IA32_MC0_* names	Elyes HAOUAS
2018-09-30	soc/cavium/cn81xx/spi: Add function to return SPI clock	Patrick Rudolph
2018-09-28	amd/stoneyridge: Make gnvs ASL whitespace consistent	Marshall Dawson
2018-09-28	soc/amd/stoneyridge/BiosCallOuts: Remove #include <AmdLib.h>	Richard Spiegel
2018-09-28	soc/intel/cannonlake: Fix ACPI FADT table generation	Duncan Laurie
2018-09-28	soc/intel/cannonlake: Move SkipMpInit config to FSPM	Lijian Zhao
2018-09-28	soc/amd/common/block/pi: Remove references to AmdLib	Richard Spiegel
2018-09-28	soc/intel/cannonlake: Add ACPI entry for LAN	Lijian Zhao
2018-09-28	soc/intel/cannonlake: Update UPD from device switch	Lijian Zhao
2018-09-28	src/*: normalize Google copyright headers	Patrick Georgi
2018-09-26	soc/sifive/fu540: Document #if ENV_ROMSTAGE line	Jonathan Neuschäfer
2018-09-26	soc/sifive/fu540: Remove PLL parameters from sdram.c	Jonathan Neuschäfer
2018-09-26	mb/lowrisc: Remove the Nexys4DDR port	Jonathan Neuschäfer
2018-09-26	soc/intel/common/block: Don't use device_t	Elyes HAOUAS
2018-09-24	amd/common/psp: Remove use of PspBaseLib	Charles Marslett
2018-09-24	soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific	Richard Spiegel
2018-09-22	skylake,kabylake: Add support to set eMMC tuning param from dev tree	Pratik Prajapati
2018-09-21	soc/intel/denverton_ns/csme_ie_kt.c: Don't use device_t	Elyes HAOUAS
2018-09-21	soc/intel/braswell/ramstage.c: Add SoC stepping D-1 support	Frans Hendriks
2018-09-21	soc/intel/quark/uart.c: Don't use device_t	Elyes HAOUAS
2018-09-21	soc/intel/skylake: Don't use device_t	Elyes HAOUAS
2018-09-21	soc/broadwell: Don't use device_t	Elyes HAOUAS
2018-09-21	soc/intel/skylake: Include some microcode blobs	Arthur Heymans
2018-09-21	soc/intel/cannonlake: Correct ITSS port id.	praveen hodagatta pranesh
2018-09-20	soc/intel/cannonlake: Remove const for spd_smbus_address	Lijian Zhao
2018-09-20	soc/amd/stoneyridge/romstage.c: Remove obsolete comment	Richard Spiegel
2018-09-20	soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources	Werner Zeh
2018-09-20	fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device	Werner Zeh
2018-09-19	amd/stoneyridge: Sync PSP base to MSR	Marshall Dawson
2018-09-18	soc/intel/common/block: Don't use device_t in ramstage	Elyes HAOUAS
2018-09-18	soc/cavium/cn81xx: Don't use device_t in ramstage	Elyes HAOUAS
2018-09-18	cpu/*/car: fix ancient URL explaining XIP range run-time calculation	Stefan Tauner
2018-09-17	mb/google/kahlee/variants/baseboard: Set STAPM percentage	Richard Spiegel
2018-09-17	soc/intel/broadwell: Add PCH_GPIO_PIRQ_INVERT definition	Matt DeVillier
2018-09-15	sifive/hifive-unleashed: enable CBMEM support	Philipp Hug
2018-09-15	soc/sifive: move ram_resource to mainboard	Philipp Hug
2018-09-14	soc/intel/denverton_ns: Enable common block PMC	Julien Viard de Galbert
2018-09-14	soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation	Philipp Hug
2018-09-14	soc/sifive/fu540: Initialize SDRAM	Philipp Hug
2018-09-14	soc/sifive/fu540: Switch clock to 1GHz in romstage	Philipp Hug
2018-09-14	soc/sifive/fu540: create ram_resource with actual memory size	Philipp Hug
2018-09-14	arch/riscv: provide a monotonic timer	Philipp Hug
2018-09-14	soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization	Philipp Hug
2018-09-14	complier.h: add __always_inline and use it in code base	Aaron Durbin
2018-09-13	soc/sifive/fu540: Get SDRAM controller out of reset	Philipp Hug
2018-09-13	soc/sifive/fu540: Update clock settings according SiFive bootloader	Philipp Hug