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AgeCommit message (Expand)Author
2018-09-21soc/intel/braswell/ramstage.c: Add SoC stepping D-1 supportFrans Hendriks
2018-09-21soc/intel/quark/uart.c: Don't use device_tElyes HAOUAS
2018-09-21soc/intel/skylake: Don't use device_tElyes HAOUAS
2018-09-21soc/broadwell: Don't use device_tElyes HAOUAS
2018-09-21soc/intel/skylake: Include some microcode blobsArthur Heymans
2018-09-21soc/intel/cannonlake: Correct ITSS port id.praveen hodagatta pranesh
2018-09-20soc/intel/cannonlake: Remove const for spd_smbus_addressLijian Zhao
2018-09-20soc/amd/stoneyridge/romstage.c: Remove obsolete commentRichard Spiegel
2018-09-20soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resourcesWerner Zeh
2018-09-20fsp_broadwell_de: Move DMAR table generation to corresponding VT-d deviceWerner Zeh
2018-09-19amd/stoneyridge: Sync PSP base to MSRMarshall Dawson
2018-09-18soc/intel/common/block: Don't use device_t in ramstageElyes HAOUAS
2018-09-18soc/cavium/cn81xx: Don't use device_t in ramstageElyes HAOUAS
2018-09-18cpu/*/car: fix ancient URL explaining XIP range run-time calculationStefan Tauner
2018-09-17mb/google/kahlee/variants/baseboard: Set STAPM percentageRichard Spiegel
2018-09-17soc/intel/broadwell: Add PCH_GPIO_PIRQ_INVERT definitionMatt DeVillier
2018-09-15sifive/hifive-unleashed: enable CBMEM supportPhilipp Hug
2018-09-15soc/sifive: move ram_resource to mainboardPhilipp Hug
2018-09-14soc/intel/denverton_ns: Enable common block PMCJulien Viard de Galbert
2018-09-14soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculationPhilipp Hug
2018-09-14soc/sifive/fu540: Initialize SDRAMPhilipp Hug
2018-09-14soc/sifive/fu540: Switch clock to 1GHz in romstagePhilipp Hug
2018-09-14soc/sifive/fu540: create ram_resource with actual memory sizePhilipp Hug
2018-09-14arch/riscv: provide a monotonic timerPhilipp Hug
2018-09-14soc/sifive/fu540: add SiFive supplied header files for SDRAM initializationPhilipp Hug
2018-09-14complier.h: add __always_inline and use it in code baseAaron Durbin
2018-09-13soc/sifive/fu540: Get SDRAM controller out of resetPhilipp Hug
2018-09-13soc/sifive/fu540: Update clock settings according SiFive bootloaderPhilipp Hug
2018-09-13uart/sifive: make divisor configurablePhilipp Hug
2018-09-13src/*/intel/: clarify Kconfig options regarding IFDStefan Tauner
2018-09-12soc/sifive/fu540: Initialize PLL and clockPhilipp Hug
2018-09-12soc/amd/stoneyridge: Fix more GPIO functionsJonathan Neuschäfer
2018-09-11amd/stoneyridge: Enable BERT table generationMarshall Dawson
2018-09-11amd/stoneyridge: Set BERT region size when no TSEG usedMarshall Dawson
2018-09-11soc/intel/baytrail: Remove trailing space in log messagePaul Menzel
2018-09-10soc/sifive: fix compiler warningPhilipp Hug
2018-09-10soc/sifive/fu540: Makefile: include mtime_init in ramstagePhilipp Hug
2018-09-10soc/sifive/fu540: Add driver for OTP memoryPhilipp Hug
2018-09-10soc/intel/cannonlake: Correct number of root ports for CNL PCH HMaulik V Vaghela
2018-09-10soc/sifive/fu540: add CLINT supportXiang Wang
2018-09-10riscv: update mtime initializationXiang Wang
2018-09-10complier.h: add __noreturn and use it in code baseAaron Durbin
2018-09-10soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetreeShaunak Saha
2018-09-07amd/stoneyridge: Construct ACPI BERT tableMarshall Dawson
2018-09-07amd/stoneyridge: Construct BERT region from machine checkMarshall Dawson
2018-09-07amd/stoneyridge: Create an MCA structureMarshall Dawson
2018-09-07amd/stoneyridge: Relocate MCA error identificationMarshall Dawson
2018-09-07amd/stoneyridge: Adjust memory map for reservedMarshall Dawson
2018-09-07fsp_broadwell_de: enable spi consoleOkash Khawaja
2018-09-06soc/intel/cannonlake: Fix Coverity Scan reportLijian Zhao
2018-09-06mediatek: Refactor memory test code among similar SoCsTristan Shieh
2018-09-06soc/intel/common: Add function to set BILD bit in RTCRizwan Qureshi
2018-09-06chromeos/gnvs: remove function and naming cleanupJoel Kitching
2018-09-02riscv: separately define stack locations at different stagesXiang Wang
2018-08-31siemens/mc_apl1: Correct the Tx signal from SATA interfaceMario Scheithauer
2018-08-30soc/intel/cannonlake: Fix comment errors for SMBUSLijian Zhao
2018-08-30soc/amd/stoneyridge/enable_usbdebug.c: Update pci_ehci_dbg_set_port()Richard Spiegel
2018-08-30soc/intel/cannonlake: Update PMC base address for CNP H and LPMaulik V Vaghela
2018-08-28soc/intel/cannonlake: Change LPDDR4 to MEMCFGLijian Zhao
2018-08-28siemens/mc_apl1: Extend circuit life by clock gating and power gatingMario Scheithauer
2018-08-27intel: Use common HPET table revision functionMarc Jones
2018-08-27update all FADT version 3.0 to use the get tables functionMarc Jones
2018-08-24soc/intel/apollolake: Make eMMC max speed configurableMario Scheithauer
2018-08-24soc/cn81xx: Add vboot supportPhilipp Deppenwiese
2018-08-24soc/cavium/cn81xx: Don't directly manipulate devicetree dataPatrick Rudolph
2018-08-24device_tree/fit: Constify data structuresPatrick Rudolph
2018-08-22soc/intel/apollolake: Fix logical vs. bitwise operatorJohn Zhao
2018-08-22soc/amd/stoneyridge/smihandler.c: Report pending wake eventRichard Spiegel
2018-08-22cbtable: remove chromeos_acpi from cbtableJoel Kitching
2018-08-22acpi: remove CBMEM_ID_ACPI_GNVS_PTR entryJoel Kitching
2018-08-21soc/intel/skylake: Remove unsupported sleepstates in ACPI tableLucas Chen
2018-08-20soc/intel/skylake: Support PL1 override optionWei Shun Chang
2018-08-20soc/intel/skylake: add CPPC supportMatt Delco
2018-08-20soc/intel/common/block: Move common uart function to block/uartSubrata Banik
2018-08-20soc/intel/common/block: Add WHL 2-core SKUKrzysztof Sywula
2018-08-20soc/intel/apollolake: Force USB-C into host modeJohn Zhao
2018-08-20intel/common/block: Fix issues found by klockworkJohn Zhao
2018-08-17arm64: Factor out common parts of romstage execution flowJulius Werner
2018-08-17soc/amd/common/block/pi/agesawarapper.c: Use find_image()Richard Spiegel
2018-08-17soc/amd/common/block: Port vendorcode's LibAmdLocateImageRichard Spiegel
2018-08-17Fix PCI ACPI _OSC methodsMarc Jones
2018-08-17soc/intel/skylake: permit Kconfig to set subsystem IDMatt Delco
2018-08-16amd/stoneyridge: Add PMxC0 reset status to boot logEdward Hill
2018-08-15Stoneyridge: Remove VENDORCODE_FULL_SUPPORTRichard Spiegel
2018-08-14soc/amd/stoneyridge: Add bootblock_fch_initRaul E Rangel
2018-08-13soc/intel/broadwell/Kconfig: Clean up redefined config optionsArthur Heymans
2018-08-13soc/intel/braswell/Kconfig: Clean up redefined config optionsArthur Heymans
2018-08-13fsp_broadwell_de: Increase CONFIG_MAX_CPUS to 32Samuel Jimenez
2018-08-13soc/intel/skylake: use unique _uidMatt Delco
2018-08-13mediatek: Map SRAM as secure and cached memoryTristan Shieh
2018-08-13intel/apollolake: Fix typo in dptf.aslChris Zhou
2018-08-13mediatek/mt8183: Add DRAM resource in ramstageTristan Shieh
2018-08-13soc/broadcom/cygnus: Increase romstage SRAM size in memlayoutPhilipp Deppenwiese
2018-08-12soc/intel/apollolake: Get rid of cnvi.aslFurquan Shaikh
2018-08-12soc/intel/apollolake: Add CNVi device to list of PCI devsFurquan Shaikh
2018-08-10drivers/i2c: Add i2c TPM support for different stagesPhilipp Deppenwiese
2018-08-10soc/cavium/cn81xx: Fix minor thingsPatrick Rudolph
2018-08-10[HACK]cavium/cn81xx/soc: Don't advertise CAR area as usablePatrick Rudolph
2018-08-10src: Fix typoElyes HAOUAS
2018-08-10src/soc/intel: Add new device IDs to support coffeelakeMaulik