coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-12-02	soc/intel/cannonlake: Initialize PMC controller	Subrata Banik
2017-12-02	soc/intel/common/block: Add Intel common PMC controller support for KBL, APL	Subrata Banik
2017-12-02	soc/amd/stoneyridge: Add GPIO40 to GPIO list	Martin Roth
2017-12-02	soc/amd/stoneyridge: Add RunOnAP support	Marc Jones
2017-12-01	amd/stoneyridge: Update def_callouts.c to reset using reset.c	Martin Roth
2017-12-01	soc/amd/stoney: clean up and update reset.c	Martin Roth
2017-11-30	acpi/tpm: remove non-existent IRQ for Infineon TPM chip	Matt DeVillier
2017-11-30	amd/{hudson,stoneyridge}: fix out of bounds read	Richard Spiegel
2017-11-30	acpi/tpm: update TPM preprocessor guards	Matt DeVillier
2017-11-30	soc/intel/skylake: Set low maximum temperature threshold for Thermal Device	Subrata Banik
2017-11-30	soc/intel/{APL,GLK}: Use Intel SRAM common code	V Sowmya
2017-11-30	soc/intel/common: Add Intel SRAM common code support	V Sowmya
2017-11-29	soc/amd/stoneyridge: Add mainboard call for SPD values	Marc Jones
2017-11-28	soc/intel/skylake: Make use of Intel common DSP block	Subrata Banik
2017-11-28	google/scarlet: support kd097d04 panel	Lin Huang
2017-11-28	rockchip/rk3399: support dual mipi dsi	Lin Huang
2017-11-28	rockchip/rk3399: mipi: properly configure PHY timing	Lin Huang
2017-11-28	rockchip/rk3399: improve mipi transfer flow	Lin Huang
2017-11-28	rockchip/rk3399: mipi: correct Feedback divider setting	Lin Huang
2017-11-28	rockchip/rk3399: mipi: correct phy parameter setting	Lin Huang
2017-11-28	rockchip/rk3399: mipi: Fix LOOP_DIV_HIGH_SEL to be 4 bits wide	Lin Huang
2017-11-28	intel/common/block: Add SKL CSME device ID	Subrata Banik
2017-11-28	AMD platforms: Fix ASL comment that implies "\_SB" is southbridge	Martin Roth
2017-11-23	soc/intel/cannonlake: Add PM methods to power gate SD card controller	Vaibhav Shankar
2017-11-23	soc/intel/cannonlake: Invoke pmc and hard reset only if CSE fails to reset	John Zhao
2017-11-23	Constify struct cpu_device_id instances	Jonathan Neuschäfer
2017-11-23	soc/amd/common: Include appropriate headers in dimm_spd.h	Marc Jones
2017-11-23	soc/amd/stoneyridge: Get entire DDR4 SPD	Marc Jones
2017-11-22	Create SOC description file soc.asl	Richard Spiegel
2017-11-21	src/soc/intel/apollolake: move TCO1 disable into bootblock	Vadim Bendebury
2017-11-21	soc/amd/stoneyridge: Add ELOG to SMM	John E. Kabat Jr
2017-11-21	amd/stoneyridge/spi: Fix reads greater than 5 bytes	Marshall Dawson
2017-11-21	soc/amd/common: Remove duplicated #include amd_pci_int_defs.h	Richard Spiegel
2017-11-20	soc/intel/cannonlake: Add ACPI workaround for EMMC	Lijian Zhao
2017-11-20	amd/stoneyridge: Fix SPD files and functions camel case	Marc Jones
2017-11-17	Move amd/stoneyridge/include/amd_pci_int_defs.h to include/soc/	Richard Spiegel
2017-11-17	soc/intel/cannonlake: fix gpio pin numbers	Bora Guvendik
2017-11-17	soc/intel/cannonlake: Add cpu.asl file	Shaunak Saha
2017-11-17	amd/stoneyridge: Enable SMI trap on SlpTyp	Marshall Dawson
2017-11-17	amd/stoneyridge: Add SlpTyp SMI handler	Marshall Dawson
2017-11-17	amd/stoneyridge: Add SPI controller driver	Marshall Dawson
2017-11-16	vendorcode/amd/pi/00670F00: Get rid of filecodes, replace filecode.h	Martin Roth
2017-11-15	mb/{amd/gardenia,google/kahlee}: move carrizo_fch.asl code to soc	Richard Spiegel
2017-11-15	soc/intel/skylake: Make use of common CSE code for skylake	Subrata Banik
2017-11-15	soc/intel/common: Use HOST_CSR to get circular Buffer Depth	Subrata Banik
2017-11-15	soc/intel/common: Add HECI message retry count	Subrata Banik
2017-11-15	soc/intel: Enable ACPI DBG2 table generation	Duncan Laurie
2017-11-15	soc/intel/cannonlake: Fix and clean up xhci ACPI code	Vaibhav Shankar
2017-11-14	soc/amd/stoneyridge: Remove direct AGESA header includes	Martin Roth
2017-11-14	soc/amd/common: Remove direct AGESA header includes	Martin Roth
2017-11-14	AMD Stoney Ridge: Add agesa_headers.h	Martin Roth
2017-11-14	amd/common/spi: Update flash driver usage	Marshall Dawson
2017-11-14	soc/amd/stoneyridge: Load SMU fimware using PSP	Marshall Dawson
2017-11-14	amd/stoneyridge: Add generic IMC sleep and wakeup	Marshall Dawson
2017-11-14	amd/stoneyridge: Replace BIT(n) in southbridge	Marshall Dawson
2017-11-14	amd/stoneyridge: Define bits for AcpiConfig	Marshall Dawson
2017-11-13	soc/intel/common: Add error print in common i2c	Lijian Zhao
2017-11-13	soc/intel/cannonlake: Define default LPSS clock	Lijian Zhao
2017-11-13	soc/amd/stoneyridge: Add CPU PPKG ASL	Marc Jones
2017-11-13	soc/amd/stoneyridge: Add GNVS variables for thermal control	Marc Jones
2017-11-13	soc/amd/stoneyridge: Fix DRAM clear check	Marshall Dawson
2017-11-11	soc/intel/apollolake: Make use of Intel SPI common block	Subrata Banik
2017-11-11	soc/intel/apollolake: Add support for SPI device	Subrata Banik
2017-11-11	soc/intel/cannonlake: Make use of Intel SPI common block	Subrata Banik
2017-11-11	soc/intel/skylake: Make use of Intel SPI common block	Subrata Banik
2017-11-11	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	Subrata Banik
2017-11-11	soc/intel/common/block: Add Intel common SPI support	Subrata Banik
2017-11-10	soc/amd/stoneyridge: Add UMA settings to devicetree	Aaron Durbin
2017-11-10	amd/stoneyridge: Implement vboot_platform_is_resuming	Marshall Dawson
2017-11-10	amd/stoneyridge: Add function to find Pm1EvtBlk base	Marshall Dawson
2017-11-10	amd/stoneyridge: Remove dead southbridge definitions	Marshall Dawson
2017-11-10	amd/stoneyridge: Add more ACPI register definitions	Marshall Dawson
2017-11-10	amd/stoneyridge: Use the new generic acpi_sleep_from_pm1	Marshall Dawson
2017-11-10	amd/stoneyridge: Select AMD common sleep states	Marshall Dawson
2017-11-10	soc/amd/stoneyridge: Use uint8_t as type for SPD address	Richard Spiegel
2017-11-10	soc/amd/stoneyridge: Simplify and fix SMBUS code	Richard Spiegel
2017-11-10	soc/amd/common: Add DRAM clear option to northbridge.c	Richard Spiegel
2017-11-10	soc/intel/cannonlake: Remove structure variable initialization with 0	Subrata Banik
2017-11-10	soc/intel/common: Fix CSE common code to accomodate Skylake/Kabylake	Subrata Banik
2017-11-10	soc/intel/apollolake: Include HECI BAR0 address inside iomap.h	Subrata Banik
2017-11-10	src/soc/amd/stoneyridge/southbridge.h: Fix prototypes	Richard Spiegel
2017-11-09	soc/amd/stoneyridge: Fix and clean lpc.c	Richard Spiegel
2017-11-09	src/soc/amd/stoneyridge/southbridge.h: Remove unused prototypes	Richard Spiegel
2017-11-08	amd/stoneyridge: Add PSP definitions southbridge and iomap	Marshall Dawson
2017-11-08	amd/stoneyridge: Add SMU firmware blobs to cbfs	Marshall Dawson
2017-11-08	soc/amd/common/psp: Add command to load fw blobs	Marshall Dawson
2017-11-08	amd/stoneyridge: Remove fixme.c	Marshall Dawson
2017-11-08	amd/stoneyridge: Remove amdlib functions from fixme.c	Marshall Dawson
2017-11-08	amd/stoneyridge: Add northbridge register macros	Marshall Dawson
2017-11-07	soc/intel/kabylake: Add Dialog da7219 NHLT blob support	Naveen Manohar
2017-11-07	src: Fix all Siemens copyrights	Mario Scheithauer
2017-11-07	soc/intel/denverton_ns: re-factor HSIO configuration	Julien Viard de Galbert
2017-11-07	RISC-V boards: Stop using the config string	Jonathan Neuschäfer
2017-11-06	soc/amd/common/psp: Require PSP PCI definition in SOC	Marshall Dawson
2017-11-06	soc/amd/stoneyridge: consolidate addresses in iomap.h	Aaron Durbin
2017-11-06	soc/amd/stoneyridge: start header file for iomap	Aaron Durbin
2017-11-04	soc/amd/stoneyridge: don't open code known literals	Aaron Durbin
2017-11-04	soc/amd/stoneyridge: fix incorrect constants in macros	Aaron Durbin
2017-11-04	soc/amd/stoneyridge: remove superfluous NULL field initialization	Aaron Durbin
2017-11-04	soc/amd/common: remove superfluous NULL initializers on globals	Aaron Durbin