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AgeCommit message (Expand)Author
2016-01-19Braswell: add code to support customization of I2C data hold timeKane Chen
2016-01-19intel/skylake: Fix issues found by klockworkNaresh G Solanki
2016-01-19intel/skylake: Adding provision to set voltages to the I2C portsNaresh G Solanki
2016-01-19intel/skylake: Disable SaGv in recovery modeharidhar
2016-01-19soc/braswell: Remove the unneccessary functions from pcie.cShaunak Saha
2016-01-19intel/skylake: Add support for IV feedback loop capture blobSathya Prakash M R
2016-01-18intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInitBarnali Sarkar
2016-01-18intel/skylake: Remove unused devicetree configuration variablesDuncan Laurie
2016-01-18intel/skylake: provide default VR configurationAaron Durbin
2016-01-18intel/skylake: Add devicetree setting for DDR frequency limit UPDDuncan Laurie
2016-01-18intel/skylake: Add elog event for THERMTRIPDuncan Laurie
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2016-01-17intel/skylake: disable heci1 if psf is unlockedArchana Patni
2016-01-17intel/skylake: During RO mode after FSP reset CB lose original stateSubrata Banik
2016-01-16intel/skylake: Fix uninitialized variable warningMartin Roth
2016-01-16intel/skylake: Add kconfig option to skip Native SD ControllerSubrata Banik
2016-01-16intel/skylake: Add VrConfig UPD parameters from corebootRizwan Qureshi
2016-01-16intel/skylake: Enable SkipMpInit tokenRizwan Qureshi
2016-01-15intel/skylake: Init variable so GCC knows it's setMartin Roth
2016-01-15intel/skylake: More UPD params are added for PCH policy in FSPRizwan Qureshi
2016-01-15intel/skylake: Update UPD parameters as per FSP 1.8.0Barnali Sarkar
2016-01-15intel/skylake: Add GPIO ACPI Apis.Subrata Banik
2016-01-15intel/skylake: add nhlt supportAaron Durbin
2016-01-14soc/braswell: Add CPUID for D0 steppingDivya Sasidharan
2016-01-14soc/braswell: Fix P-state tableSubrata Banik
2016-01-14intel/skylake/pcr.c: error out on invalid size in pcr read/writeMartin Roth
2016-01-13tree: drop last paragraph of GPL copyright header from new filesMartin Roth
2016-01-12intel/skylake: Remove check for Microcode loaded by MEMartin Roth
2016-01-08fsp_baytrail: Add additional PCI space above 4GBMartin Roth
2016-01-07intel/braswell: Disable IFD & ME by default so abuild can buildMartin Roth
2016-01-07Correct some common spelling mistakesMartin Roth
2016-01-06intel/braswell: Build in both C0 and 'other' vbiosMartin Roth
2015-12-31imgtec/pistachio: disable default RPU gate register valuesIonela Voinescu
2015-12-31imgtec/pistachio: memlayout: update GRAM sizeIonela Voinescu
2015-12-31imgtec/pistachio: I2C: fix base address for I2C clock setupIonela Voinescu
2015-12-31imgtec/pistachio: identity map SOC registers regionIonela Voinescu
2015-12-31imgtec/pistachio: Add SOC_REGISTERS memory regionIonela Voinescu
2015-12-31imgtec/pistachio: Use SYS PLL in integer modeIonela Voinescu
2015-12-29mips: add coherency argument to identity mappingIonela Voinescu
2015-12-27mainboard/google/urara: change SYS PLL to 700MHzIonela Voinescu
2015-12-27soc/intel/broadwell: Add back support for EHCI debug setupDuncan Laurie
2015-12-27broadwell: Fix SATA Gen3 DTLE configuration registersDuncan Laurie
2015-12-27broadwell: Fix CONFIG_SPI_CONSOLE usageDuncan Laurie
2015-12-26ACPI: Add hack to avoid IASL warning when reading back registersMartin Roth
2015-12-22soc/intel/fsp_baytrail: Make sure i2c bus is < 7Martin Roth
2015-12-21imgtec/pistachio: DDR2, DDR3: DLL reset setIonela Voinescu
2015-12-21imgtec/pistachio: DDR2, DDR3: DQS gate earlyIonela Voinescu
2015-12-21imgtec/pistachio: increase CBFS cacheIonela Voinescu
2015-12-20soc/intel/broadwell: Init var before use, only use when neededMartin Roth
2015-12-17Drop src/cpu/ indirection for MIPSStefan Reinauer
2015-12-17soc/imgtec/pistachio: add implementation for system resetIonela Voinescu
2015-12-17soc/imgtec/pistachio: Implement hard_reset()Stefan Reinauer
2015-12-17soc/intel/fsp_baytrail: Adjust root port INT routingMartin Roth
2015-12-16intel/fsp_baytrail: change indent to use tabsBen Gardner
2015-12-16intel/fsp_baytrail: rename include folder baytrail to include/socBen Gardner
2015-12-16intel/fsp_baytrail: Fix PCI_DEV_PIRQ_ROUTE macro endingBen Gardner
2015-12-16soc/samsung/exynos5250: Implement hard_reset()Stefan Reinauer
2015-12-16intel/skylake: Work around ROMCC optimization bugStefan Reinauer
2015-12-15x86 acpi: remove ALIGN_CURRENT macroAaron Durbin
2015-12-11mrc_cache: add version fieldAaron Durbin
2015-12-10soc/mediatek/mt8173: SPI_ATOMIC_SEQUENCING depends on SPI_FLASHMartin Roth
2015-12-10ACPI: Fix IASL Warning about unused method for GBUF checkMartin Roth
2015-12-10intel/fsp_baytrail: Remove code for nonexistant BBARBen Gardner
2015-12-10lib: remove assets infrastructureAaron Durbin
2015-12-08soc/intel/common: Remove USE_FMAP - symbol doesn't existMartin Roth
2015-12-08soc/intel/skylake: Remove obsolete Kconfig symbolsMartin Roth
2015-12-06fsp_baytrail: Add missing newline to eMMC Mode logBen Gardner
2015-12-06Remove #ifdef checks on Kconfig symbolsMartin Roth
2015-12-04mediatek/mt8173: Add APIs for PMIC GPIO controlBiao Huang
2015-12-04mediatek/mt8173: Add mt6391 PMIC driverhenryc.chen
2015-12-04braswell/skylake: Add FspUpdVpd.h to fix compilationStefan Reinauer
2015-12-03google/oak: Initialize the necessary pinsBiao Huang
2015-12-03mediatek/mt8173: Add GPIO driverBiao Huang
2015-12-03mediatek/mt8173: move PRERAM_CBFS_CACHE from SRAM_L2CYidi Lin
2015-12-03intel/skylake: Add ACPI device for audio controllerDuncan Laurie
2015-12-03intel/skylake: Remove unused code to add SSDT2Duncan Laurie
2015-12-03mediatek/mt8173: Add PMIC wrapper driverhenryc.chen
2015-12-03mediatek/mt8173: Add PLL driverJames Liao
2015-12-03mediatek/mt8173: Add a stub implementation of the MT8173 SoCYidi Lin
2015-12-03cbfs_spi: enable CBFS access in early romstageMary Ruthven
2015-11-30fsp_baytrail: Remove use of BAYTRAIL_SMM Kconfig symbolMartin Roth
2015-11-28baytrail: fix missing brackets around ir_base to fix IRQ routingAlexander Couzens
2015-11-27soc/intel/common: Fix whitespace in KconfigMartin Roth
2015-11-24intel/soc/baytrail: Move MCRS ResourceTemplate out of _CRS methodMartin Roth
2015-11-24soc/intel/braswell: Drop gfx_read_resources()Nico Huber
2015-11-21baytrail: add C0 and D0 stepping decodeBen Gardner
2015-11-20intel/skylake: Fix flash_controller.c compilationStefan Reinauer
2015-11-20intel: Add MMA feature in corebootPratik Prajapati
2015-11-20fsp1_0: Remove hardcoded microcode locationsMartin Roth
2015-11-18google/veyron*: Pulse the i2c clock once if sda was lowDouglas Anderson
2015-11-17arm64: tegra132: tegra210: Remove old arm64/stage_entry.SJulius Werner
2015-11-17fsp_baytrail: use external microcode .h filesMartin Roth
2015-11-16arm64: Implement generic stage transitions for non-Tegra SoCsJulius Werner
2015-11-16intel/fsp_baytrail: Load APs microcode in baytrail_init_cpusYork Yang
2015-11-16intel/fsp_baytrail: Load BSP microcode in bootblockYork Yang
2015-11-13intel/skylake: ensure the RTC time is setAaron Durbin
2015-11-11fsp_baytrail: Add macros for legacy GPIO output set upWerner Zeh
2015-11-11arm/arm64: Generalize bootblock C entry pointJulius Werner
2015-11-11arm64: mmu: Make page table manipulation work across stagesJulius Werner
2015-11-10rockchip/rk3288: hdmi: configure display output mode with EDID informationYakir Yang
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