| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-08-15 | soc/ucb/riscv: select BOOTBLOCK_CONSOLE | Jonathan Neuschäfer |
| 2016-07-15 | arch/riscv: Move CBMEM into RAM | Jonathan Neuschäfer |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-29 | kbuild: automatically include SOCs | Stefan Reinauer |
| 2015-01-27 | CBMEM: Always use DYNAMIC_CBMEM | Kyösti Mälkki |
| 2015-01-27 | vboot2: add verstage | Stefan Reinauer |
| 2014-12-09 | UCB RISCV: Switch to DYNAMIC_CBMEM | Kyösti Mälkki |
| 2014-12-01 | Add UCB RISCV support for architecture, soc, and emulation mainboard.. | Ronald G. Minnich |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |