Age | Commit message (Expand) | Author |
2020-09-12 | include/console/uart: make index parameter unsigned | Felix Held |
2020-08-24 | soc/sifive: Drop unneeded empty lines | Elyes HAOUAS |
2020-06-13 | treewide: Add Kconfig variable MEMLAYOUT_LD_FILE | Furquan Shaikh |
2020-05-28 | soc/sifive/fu540: Add chip_operations stub | Kyösti Mälkki |
2020-05-18 | src: Remove leading blank lines from SPDX header | Elyes HAOUAS |
2020-05-13 | src: Remove unused '#include <stddef.h>' | Elyes HAOUAS |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-11 | soc/sifive/fu540: Add missing '#include <commonlib/bsd/helpers.h>' | Elyes HAOUAS |
2020-05-09 | src/: Replace GPL boilerplate with SPDX headers | Patrick Georgi |
2020-05-08 | {security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX header | Elyes HAOUAS |
2020-04-05 | soc/sifive: Use SPDX for GPL-2.0-only files | Angel Pons |
2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
2020-02-24 | soc/{samsung,sifive}: Fix typos | Elyes HAOUAS |
2019-12-20 | src: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
2019-12-19 | soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-12-11 | fmap: Make FMAP_CACHE mandatory if it is configured in | Julius Werner |
2019-12-04 | Change all clrsetbits_leXX() to clrsetbitsXX() | Julius Werner |
2019-11-14 | soc/sifive/fu540: Support booting from SD card | Xiang Wang |
2019-11-01 | lib/cbmem_top: Add a common cbmem_top implementation | Arthur Heymans |
2019-11-01 | soc/{mediatek,sifive}: Remove unused 'include <arch/barrier.h>' | Elyes HAOUAS |
2019-10-16 | soc/sifive/fu540: test and fix code of fu540 spi | Xiang Wang |
2019-08-12 | soc/sifive/fu540: add code for spi and map flash to memory spaces | Xiang Wang |
2019-08-05 | soc/sifive/fu540: Add opensbi support | Patrick Rudolph |
2019-07-09 | arch/non-x86: Flip HAVE_MONOTONIC_TIMER default | Kyösti Mälkki |
2019-03-18 | src/mb/sifive/hifive-unleashed: initialize Gigabit Ethernet Controller | Xiang Wang |
2019-03-04 | device/mmio.h: Add include file for MMIO ops | Kyösti Mälkki |
2019-01-24 | riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCV | Ronald G. Minnich |
2019-01-17 | riscv: create Kconfig architecture features for new parts | Ronald G. Minnich |
2019-01-14 | console: Change BOOTBLOCK_CONSOLE default to `y` | Nico Huber |
2018-12-07 | riscv: fix non-SMP support | Philipp Hug |
2018-12-05 | soc/sifive/fu540: Add helper function to get tlclk frequency | Jonathan Neuschäfer |
2018-12-04 | soc/sifive/fu540: Load PLL settings from a struct | Jonathan Neuschäfer |
2018-12-03 | soc/sifive/fu540: Simplify UART refclk calculation | Jonathan Neuschäfer |
2018-11-05 | riscv: add support smp_pause / smp_resume | Xiang Wang |
2018-10-30 | sifive/fu540: correct cbmem support | Philipp Hug |
2018-09-26 | soc/sifive/fu540: Document #if ENV_ROMSTAGE line | Jonathan Neuschäfer |
2018-09-26 | soc/sifive/fu540: Remove PLL parameters from sdram.c | Jonathan Neuschäfer |
2018-09-15 | sifive/hifive-unleashed: enable CBMEM support | Philipp Hug |
2018-09-15 | soc/sifive: move ram_resource to mainboard | Philipp Hug |
2018-09-14 | soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation | Philipp Hug |
2018-09-14 | soc/sifive/fu540: Initialize SDRAM | Philipp Hug |
2018-09-14 | soc/sifive/fu540: Switch clock to 1GHz in romstage | Philipp Hug |
2018-09-14 | soc/sifive/fu540: create ram_resource with actual memory size | Philipp Hug |
2018-09-14 | arch/riscv: provide a monotonic timer | Philipp Hug |
2018-09-14 | soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization | Philipp Hug |
2018-09-13 | soc/sifive/fu540: Get SDRAM controller out of reset | Philipp Hug |
2018-09-13 | soc/sifive/fu540: Update clock settings according SiFive bootloader | Philipp Hug |
2018-09-13 | uart/sifive: make divisor configurable | Philipp Hug |
2018-09-12 | soc/sifive/fu540: Initialize PLL and clock | Philipp Hug |
2018-09-10 | soc/sifive: fix compiler warning | Philipp Hug |
2018-09-10 | soc/sifive/fu540: Makefile: include mtime_init in ramstage | Philipp Hug |
2018-09-10 | soc/sifive/fu540: Add driver for OTP memory | Philipp Hug |
2018-09-10 | soc/sifive/fu540: add CLINT support | Xiang Wang |
2018-09-10 | riscv: update mtime initialization | Xiang Wang |
2018-09-02 | riscv: separately define stack locations at different stages | Xiang Wang |
2018-07-18 | sifive/fu540: add empty sdram init and size functions | Philipp Hug |
2018-07-17 | riscv: add support for modifying compiler options | Xiang Wang |
2018-04-26 | src/sifive: Add the SiFive Freedom Unleashed 540 SoC | Jonathan Neuschäfer |