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path: root/src/soc/rockchip/rk3399/sdram.c
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2016-08-09rockchip/rk3399: sdram: correct read obs and set DQS driver registerLin Huang
We were using the wrong register when reading the obs value and setting the DQS driver. This did not affect LPDDR3 performance, but still needs to be fixed. BUG=none BRANCH=none TEST=boot from kevin Change-Id: I144f575e27fba11872a8c5463ab1e2986f385ede Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 98221e6b03fc09cbf62af29a270e7a8aa8dfb986 Original-Change-Id: Ie179f9a2955c5712951d40b3ada9c14a51c09c8d Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/363170 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/16052 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-28rockchip/rk3399: sdram: correct controller vref settingLin Huang
When enabling the controller ODT, the controller vref needs to correspond with the ODT value and DQ drive strength. BRANCH=none BUG=chrome-os-partner:54871 TEST=run "stressapptest -M 1024 -s 1000" on kevin board and pass Original-Commit-Id: a7251c72b87d9f149b68d086c3252f1c668e0e80 Original-Change-Id: I7e54b3473f68a382208a0fb0b0600552fe6390ad Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/358762 Original-Commit-Ready: Dan Shi <dshi@chromium.org> Original-Tested-by: Caesar Wang <wxt@rock-chips.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Squashed with: rockchip/rk3399: Halt if we get an invalid odt or drv value When we were pushing the updated sdram.c to coreboot.org, the compiler there found that we were not initializing vref_value_dq in all code possible code paths. This patch updates those code paths to halt the system. Branch=none Bug=none Test=Built with coreboot.org toolchain and verified that the compile errors were gone. Change-Id: I0ad4207dc976236d64b6cdda58d10bcfbe1fde11 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/362726 Reviewed-by: Julius Werner <jwerner@chromium.org> Change-Id: I22a0cef6f12d9aae2ea4dcb99e7ebdd788f2cdd1 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/15812 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
2016-07-25rockchip/rk3399: set CA drive strength to 48ohmsLin Huang
As shown in testing, if CA use 34.3ohms drive strength, it leads to an overshoot. To fix this, change the drive strength to 48 ohms. BRANCH=none BUG=chrome-os-partner:54871 TEST=run "stressapptest -M 1024 -s 1000" on kevin board and pass Change-Id: I8666474fc18391da14a3338611f962f2f08f36d0 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: fbc1c13f9ab808fc907b2e3f9bde1d09f92980f1 Original-Change-Id: I231f5b1bd45ff262686fbacbaf119a8a57fad27b Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/358761 Original-Commit-Ready: Dan Shi <dshi@chromium.org> Original-Tested-by: Caesar Wang <wxt@rock-chips.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/15811 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-19rockchip/rk3399: Remove unused variableMartin Roth
The 'speed' variable isn't being used after refactoring. Change-Id: Id27a920c61b2bba18d391a7bfefe570235402dec Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/15749 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-15rockchip/rk3399: Remove empty function in sdram.cDerek Basehore
This removes an empty function for sdram training. If it's needed later, we can always add it back. BRANCH=none BUG=none TEST=build and boot firmware for kevin/gru Change-Id: Id526ef86cf5044894a1a736cc39f10d32f49c072 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 3e93461b96bfadc08bf0b46cf99052d9cdffa422 Original-Change-Id: I6bf77d2f81719c68cd78722c3fe9ae547ea1e79c Original-Signed-off-by: Derek Basehore <dbasehore@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/354164 Original-Reviewed-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/15657 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-15rockchip/rk3399: Change copy_to_reg arg typeDerek Basehore
This changes the src arg for copy_to_reg to a const u32 * instead of a u32 * in sdram.c. BRANCH=none BUG=none TEST=emerge-gru coreboot Change-Id: I80f49258b2f8102f0d988fec85b8038a00e18a34 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: e0342e5c0181bf65ae78aa9518b0d6bd6cb1d5ec Original-Change-Id: I362727f1dbe6726bf3240f9219c394786162a1a0 Original-Signed-off-by: Derek Basehore <dbasehore@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/354163 Original-Reviewed-by: Martin Roth <martinroth@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/15656 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-15rockchip/rk3399: Directly access variables in sdram.cDerek Basehore
This simplifies some of the code with better variable declaractions which removes a lot of line continuations. Instead of declaring a pointer to the container of the needed struct or array, this retrieves a pointer to the struct or array instead. BRANCH=none BUG=none TEST=check that gru and kevin still build and boot properly followed by running "stressapptest -M 1024 -s 1000" and making sure it passes Change-Id: I34a9be0f35981c03a6b0c27a870981a5f69cecc0 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 5c17449fcdfbe83ec75a3a006aaf7393c66006b7 Original-Change-Id: If4e386d4029f17d811fa3ce83e5be89e661a7b11 Original-Signed-off-by: Derek Basehore <dbasehore@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/354162 Original-Reviewed-by: Martin Roth <martinroth@chromium.org> Original-Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: https://review.coreboot.org/15655 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-15rockchip/rk3399: cleanup variables in dram_all_configDerek Basehore
This removes a variable that was only used once and makes variable declarations consistent by moving those only used in one block of code into that block. BRANCH=none BUG=none TEST=on kevin/gru, run "stressapptest -M 1024 -s 3600" Change-Id: Iacfc0ffef34a4953cfb304b8cb4975b045aea585 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: a79bbbc83d0f5cccf6bb4ad44ae2239c7f4b45e3 Original-Change-Id: Id0ff0c45189c292ab40e1c4aa27929fb7780e864 Original-Signed-off-by: Derek Basehore <dbasehore@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/355667 Original-Reviewed-by: Martin Roth <martinroth@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/15654 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-15rockchip/rk3399: add/remove local variables to sdram_initDerek Basehore
This adds two local variables for dramtype and ddr_freq to sdram_init since those two values are commonly used in the function. It also removes a variable that is just used once and directly uses the value for a function call instead. BRANCH=none BUG=none TEST=on kevin/gru, run "stressapptest -M 1024 -s 3600" and check that it passes Change-Id: I4e9dbc97803ff3300b52a5e1672e7e060af2cc85 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: b7d1135c65298a73e6bf2a4a34b7c9b84f249ea8 Original-Change-Id: I4e1a1a4a8848d0eab07475a336c24bda90b2c9f8 Original-Signed-off-by: Derek Basehore <dbasehore@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/355666 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/15653 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-12rockchip/rk3399: Clean up comments in sdram.cDerek Basehore
Cleans up the comments in sdram.c to make them consistent. BRANCH=none BUG=none TEST=make sure gru/kevin build and boot also, run "stressapptest -M 1024 -s 3600" to make sure it passes Change-Id: I1daf72b847374d549389bacd2fa0a9f8f231b190 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 63a224d6f4b0e4d13bc372c05c4b9196895d553f Original-Change-Id: Iaf8a32cfe2b22c4ccff71952f90d162ad8c2d3e7 Original-Signed-off-by: Derek Basehore <dbasehore@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/355665 Original-Reviewed-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/15579 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-06-24rk3399: clean up sdram controller initialization codeVadim Bendebury
This is a purely cosmetic change replacing some of the more prominent copy and paste sections of the code with compressed versions of the same. BRANCH=none BUG=none TEST=with the rest of the patches applied stressapptest still runs for an hour on both Kevin and Gru. Change-Id: I492e1898e312473d07d9e5eceb3e3e10b48ee35f Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: eb8043f96457d090dbbee57097bc1d685e7d32d2 Original-Change-Id: I362e0e261209ae4d4890ecb0e08bb1956c172ffd Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/353774 Original-Reviewed-by: Derek Basehore <dbasehore@chromium.org> Reviewed-on: https://review.coreboot.org/15308 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-06-23rockchip/rk3399: fix sdram training issueLin Huang
After write leveling for all ranks, check the PHY_CLK_WRDQS_SLAVE_DELAY result, if the two ranks in one slice both meet (0x200-PHY_CLK_WRDQS_SLAVE_DELAY < 0x20) or (0x200-PHY_CLK_WRDQS_SLAVE > 0x1E0), enable PHY_WRLVL_EARLY_FORCE_ZERO for this slice, and trigger write leveling again. BRANCH=none BUG=chrome-os-partner:54144 TEST=run "stressapptest -M 1024 -s 1000" and pass Change-Id: I1a0e4e888eb62b5fae5b5e5437a385e8660a246d Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 717cbac97b2045f2934e99859ce405aa3637b1c4 Original-Change-Id: Ic0d7c59404e870a7108ed64bbf3215fcc2d0973e Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/351825 Reviewed-on: https://review.coreboot.org/15300 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-06-07rockchip: gru: update the hynix lpddr3 config to run at 928MHzShunqian Zheng
Update the DDR config and DRAM driver to allow running at up to 928MHz. Kevin config/clock rate are not being changed, but Gru now runs at 928 MHz. BRANCH=none BUG=chrome-os-partner:51537 TEST=booted Kevin and Gru to Linux prompt. Ran stressapptest for 10 min on Gru, Change-Id: I66c1a171d5c7d05b2878c7bc5eaa0d436c7a1be2 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 8baf0d82816a7ea1c4428e15caeefa2795d001f9 Original-Change-Id: I5e1d6d1025f10203da8f11afc3bbdf95f133c586 Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/343984 Original-Reviewed-by: Stephen Barber <smbarber@chromium.org> Reviewed-on: https://review.coreboot.org/15027 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-05-18rockchip: rk3399: improve sdram driverLin Huang
improve rk3399 sdram drvier, so we can support DDR3, and check the cs training result, so we make sdram work more stable. BRANCH=none BUG=chrome-os-partner:51537 TEST=boot from kevin, do memtester in kernel and pass Change-Id: I508bf26fb8163bab2d725a91ead929df585e04a7 Signed-off-by: Martin Roth <martinroth@google.com> Original-Commit-Id: 4d83a87c459167145b7260f9af5c0380caddc056 Original-Change-Id: Id385f1343804a829b6589f89f4cfbb6565d41417 Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/342664 Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14849 Tested-by: build bot (Jenkins) Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2016-05-09rockchip: rk3399: add sdram driverLin Huang
Add the sdram driver for rk3399. With this patch we can boot into depthcharge. This patch also include a config file for lpddr3-hynix-4GB that generated bases on its datasheet. Please refer to TRM V0.3 Part1 Chapter 9 for DMC. BRANCH=none BUG=chrome-os-partner:51537 TEST=boot to depthcharge on kevin Change-Id: I2afcaa3b68dbad77a5fe677b835289b675ed2bef Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5d777e29942057fb7237eefa34051d1f54b19405 Original-Change-Id: Ifa1fe98a7058869518757d50678a64620610d91d Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/332562 Reviewed-on: https://review.coreboot.org/14716 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09rockchip: rk3399: add simplest sdram to fix compiling errorShunqian Zheng
This patch is only to make building happy, the real sdram driver comes later. BRANCH=none BUG=none TEST=emerge-kevin coreboot Change-Id: I4123c3a6627d7264c615fefbb89e16c4dfb9a423 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5b992a7895a72c83f57228d3abd1ae37d55e7e7b Original-Change-Id: Ie340877e828ae760169ccfa9a7099e7472d2fc26 Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/338944 Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/14703 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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