Age | Commit message (Expand) | Author |
---|---|---|
2015-04-22 | rockchip/rk3288: Fix operator precedence error in LPDDR init | Julius Werner |
2015-04-21 | arm(64): Manually clean up the mess left by write32() transition | Julius Werner |
2015-04-21 | arm(64): Globally replace writel(v, a) with write32(a, v) | Julius Werner |
2015-04-21 | rockchip: configure lpddr odt properly | Derek Basehore |
2015-04-21 | rk3288: support single channel ddr | jinkun.hong |
2015-04-17 | rk3288: detect sdram size at runtime | huang lin |
2015-04-15 | rk3288: Fix failing LPDDR3 reboot test | jinkun.hong |
2015-04-15 | rk3288: Fix failing DDR3 reboot test | jinkun.hong |
2015-04-13 | rk3288: Increase the delay after DDR reset de-assert to 10us. | Dailunxue |
2015-04-08 | rk3288: Change all SoC headers to <soc/headername.h> system | Julius Werner |
2015-04-04 | veyron_pinky/rk3288: Use KHz, MHz and GHz constants | Julius Werner |
2015-04-02 | coreboot: rk3288: add new ddr config and support ddr3 freq up to 800mhz | jinkun.hong |
2015-03-24 | rk3288: add cpu and chip | huang lin |
2015-03-24 | rk3288: add ddr driver | Jinkun Hong |