coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/rockchip: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-12-04	Change all clrsetbits_leXX() to clrsetbitsXX()	Julius Werner
2019-07-19	src: Make implicit fall throughs explicit	Jacob Garber
2019-07-17	soc/rockchip/rk3288: Add fall through comment	Jacob Garber
2019-03-20	src: Use 'include <string.h>' when appropriate	Elyes HAOUAS
2019-03-04	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki
2019-01-28	src: Don't use a #defines like Kconfig symbols	Elyes HAOUAS
2018-11-29	src: Remove duplicated round up function	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-22	rockchip/rk3288: Fix operator precedence error in LPDDR init	Julius Werner
2015-04-21	arm(64): Manually clean up the mess left by write32() transition	Julius Werner
2015-04-21	arm(64): Globally replace writel(v, a) with write32(a, v)	Julius Werner
2015-04-21	rockchip: configure lpddr odt properly	Derek Basehore
2015-04-21	rk3288: support single channel ddr	jinkun.hong
2015-04-17	rk3288: detect sdram size at runtime	huang lin
2015-04-15	rk3288: Fix failing LPDDR3 reboot test	jinkun.hong
2015-04-15	rk3288: Fix failing DDR3 reboot test	jinkun.hong
2015-04-13	rk3288: Increase the delay after DDR reset de-assert to 10us.	Dailunxue
2015-04-08	rk3288: Change all SoC headers to <soc/headername.h> system	Julius Werner
2015-04-04	veyron_pinky/rk3288: Use KHz, MHz and GHz constants	Julius Werner
2015-04-02	coreboot: rk3288: add new ddr config and support ddr3 freq up to 800mhz	jinkun.hong
2015-03-24	rk3288: add cpu and chip	huang lin
2015-03-24	rk3288: add ddr driver	Jinkun Hong