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coreboot.git
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src
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soc
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rockchip
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rk3288
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clock.c
Age
Commit message (
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)
Author
2015-04-15
veyron: Trigger hard reset (via GPIO) if last reboot was caused by watchdog
Julius Werner
2015-04-10
rk3288: reset edp after edp clock source select
huang lin
2015-04-10
rockchip: support display
huang lin
2015-04-08
rk3288: Change all SoC headers to <soc/headername.h> system
Julius Werner
2015-04-08
rk3288: support tsadc
huang lin
2015-04-08
rk3288: Fix some PLL divisors and improve clock code
Julius Werner
2015-04-04
rk3288: set cpu frequency up to 1.8GHz
huang lin
2015-04-04
veyron_pinky/rk3288: Use KHz, MHz and GHz constants
Julius Werner
2015-04-02
rk3288: remove duplicated #define `PERI_ACLK_DIV_SHIFT`
Aaron Durbin
2015-04-02
rockchip: support pwm regulator
huang lin
2015-04-02
rockchip: support i2c clock setting
huang lin
2015-03-24
veyron: Fix file permissions
Julius Werner
2015-03-24
rk3288: update romstage & mainboard
huang lin
2015-03-24
rk3288: add cpu and chip
huang lin
2015-03-24
rk3288: add ddr driver
Jinkun Hong
2015-03-24
rk3288: add spi
huang lin
2015-03-24
rk3288: add clock module
jinkun.hong